H10D64/605

SEMICONDUCTOR DEVICE

A semiconductor device including a resistor and a capacitor is provided. The capacitor includes a top electrode and a bottom electrode. The semiconductor device further includes a substrate, a first well, at least two doped regions, at least one gate and at least one oxide layer. The substrate serves as the bottom electrode of the capacitor. The first well is disposed in the substrate. The doped regions are disposed in the first well and are connected to the ground. The gate is disposed in the substrate and serves as the resistor and the top electrode of the capacitor. The oxide layer is disposed between the gate and the substrate.

SEMICONDUCTOR DEVICES HAVING INNER GATE RUNNERS WITH NON-ORTHOGONAL INNER SEGMENTS
20260059837 · 2026-02-26 ·

A semiconductor device comprises a semiconductor layer structure, a gate pad on the semiconductor layer structure, and a metal gate runner on the semiconductor layer structure. The metal gate runner comprises an inner gate runner that comprises a first inner segment and a second inner segment that interconnect at a first oblique angle.

TRANSITION METAL CONTAINING CONTACT WITH REDUCED CONTACT RESISTIVITY

The present technology includes semiconductor devices and methods with improved contact resistivity. Semiconductor devices include a substrate base, a silicon oxide disposed on the base defining one or more features, a non-magnetic transition-metal doped contact silicide layer disposed on the substrate in the one or more features, and at least a first metal layer. The non-magnetic transition-metal doped contact silicide layer includes a non-magnetic transition-metal, a first metal, and a silicon containing compound, and includes greater than or about 8.0 E+13 per cm.sup.2 non-magnetic transition-metal atoms. The first metal layer includes the first metal and overlies the non-magnetic transition-metal doped contact silicide layer.

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a high resistance impedance layer between a gate and a first metal structure in a vertical direction, wherein the first metal structure comprises at least one equipotential first metal and at least one non-equipotential first metal, wherein the equipotential first metal and the high resistance impedance layer have the same potential, the non-equipotential first metal and high resistance impedance layer have not the same potential, and the non-equipotential first metal and the high resistance impedance layer do not overlap in the vertical direction, and a minimum distance, between an edge of the high resistance impedance layer and an edge of the non-equipotential first metal in a horizontal direction perpendicular to the vertical direction, is larger than a size of a random defect.