A switching device according to the present invention is a switching device for switching a load by on-off control of voltage, and includes an SiC semiconductor layer where a current path is formed by on-control of the voltage, a first electrode arranged to be in contact with the SiC semiconductor layer, and a second electrode arranged to be in contact with the SiC semiconductor layer for conducting with the first electrode due to the formation of the current path, while the first electrode has a variable resistance portion made of a material whose resistance value increases under a prescribed high-temperature condition for limiting current density of overcurrent to not more than a prescribed value when the overcurrent flows to the current path.

The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

A semiconductor device includes: a plurality of transistors on a substrate, each transistor of the plurality of transistors including a source region, a drain region, a gate structure, a polarization modulation portion, and a polarization layer. The polarization modulation portion of each of the plurality of transistors is on the polarization layer, the plurality of transistors includes a first transistor having a first threshold voltage that has a first fixed value, and the plurality of transistors includes a second transistor having a second threshold voltage that has a second fixed value different from the first fixed value.

Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.

Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.

A semiconductor device includes a semiconductor substrate with an upper surface and a channel, source and drain electrodes over the upper surface of the semiconductor substrate, a passivation layer between the source and drain electrodes, a first dielectric layer over the passivation layer, a gate electrode between the source and drain electrodes, and a conductive field plate adjacent to the gate electrode. The passivation layer includes a lower passivation sub-layer and an upper passivation sub-layer over the lower passivation sub-layer. The gate electrode includes a lower portion that extends through the passivation layer. The conductive field plate includes a first portion with a recessed region that extends through the upper passivation sub-layer but does not extend through the lower passivation sub-layer, and an overhanging portion that extends over an upper surface of the first dielectric layer.

A semiconductor device includes a semiconductor substrate with an upper surface and a channel, source and drain electrodes over the upper surface of the semiconductor substrate, a passivation layer between the source and drain electrodes, a first dielectric layer over the passivation layer, a gate electrode between the source and drain electrodes, and a conductive field plate adjacent to the gate electrode. The passivation layer includes a lower passivation sub-layer and an upper passivation sub-layer over the lower passivation sub-layer. The gate electrode includes a lower portion that extends through the passivation layer. The conductive field plate includes a first portion with a recessed region that extends through the upper passivation sub-layer but does not extend through the lower passivation sub-layer, and an overhanging portion that extends over an upper surface of the first dielectric layer.

A GaN-based device based on patterned ohmic contact is provided, including: a substrate layer, a nucleation layer, a buffer layer, a channel layer, an insertion layer, a barrier layer and a cap layer sequentially disposed in that order from bottom to top. Two ends of the cap layer respectively define ohmic contact recesses extending into the channel layer. A side wall of each ohmic contact recess close to the gate electrode includes multiple arc-shaped side walls and multiple flat side walls. Two epitaxial layers are disposed in the ohmic contact recesses respectively. A passivation layer is covered on the cap layer and the two epitaxial layers, a source electrode and a drain electrode penetrate through the passivation layer and are disposed on the two epitaxial layers respectively. A gate electrode is located between the ohmic contact recesses, and penetrates through the passivation layer and extends to the cap layer.

A capacitor device and a semiconductor device including the capacitor device are provided. The capacitor device includes first and second electrodes spaced apart from each other, and a dielectric layer provided between the first electrode and the second electrode. The dielectric layer includes a dielectric material in which ferroelectrics and antiferroelectrics are mixed with each other.

A capacitor device and a semiconductor device including the capacitor device are provided. The capacitor device includes first and second electrodes spaced apart from each other, and a dielectric layer provided between the first electrode and the second electrode. The dielectric layer includes a dielectric material in which ferroelectrics and antiferroelectrics are mixed with each other.