H10F39/014

SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF
20170221942 · 2017-08-03 ·

A semiconductor device has a chip region including a back-side illumination type photoelectric conversion element, a mark-like appearance part, a pad electrode, and a coupling part. The mark-like appearance part includes an insulation film covering the entire side surface of a trench part formed in a semiconductor substrate. The pad electrode is arranged at a position overlapping the mark-like appearance part. The coupling part couples the pad electrode and mark-like appearance part. At least a part of the pad electrode on the other main surface side of the substrate is exposed through an opening reaching the pad electrode from the other main surface side of the substrate. The mark-like appearance part and coupling part are arranged to at least partially surround the outer circumference of the opening in plan view.

Method for manufacturing semiconductor device, and semiconductor device
09721988 · 2017-08-01 · ·

Provided is a semiconductor device with improved performance. In a method for manufacturing a semiconductor device, after forming a gate electrode of a transfer transistor over a p-type well, a photodiode is formed in one part of the p-type well positioned on one side with respect to the gate electrode. Then, a cap insulating film including silicon and nitrogen is formed over the photodiode before implanting impurity ions for formation of an n-type low-concentration semiconductor region of the transfer transistor, into the other part of the p-type well positioned on a side opposite to the one side with respect to the gate electrode.

HIGH DYNAMIC RANGE IMAGE SENSOR WITH REDUCED SENSITIVITY TO HIGH INTENSITY LIGHT
20170213863 · 2017-07-27 ·

An image sensor includes first and second pluralities of photodiodes interspersed among each other in a semiconductor substrate. Incident light is to be directed through a surface of the semiconductor substrate into the first and second pluralities of photodiodes. The first plurality of photodiodes has greater sensitivity to the incident light than the second plurality of photodiodes. A metal film layer is disposed over the surface of the semiconductor substrate over the second plurality of photodiodes and not over the first plurality of photodiodes. A metal grid is disposed over the surface of the semiconductor substrate, and includes a first plurality of openings through which the incident light is directed into the first plurality of photodiodes. The metal grid further includes a second plurality of openings through which the incident light is directed through the metal film layer into the second plurality of photodiodes.

SEMICONDUCTOR DEVICE

An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes a pixel including a first active region where a photodiode and a transfer transistor are formed and a second active region for supplying a grounding potential. Over a p-type semiconductor region in the second active region, a plug for supplying the grounding potential is disposed. In an n-type semiconductor region for a drain region of the transfer transistor formed in the first active region, a gettering element is introduced. However, in the p-type semiconductor region in the second active region, the gettering element is not introduced.

Method of manufacturing solid-state image sensor

A method of manufacturing a solid-state image sensor includes forming a first element isolation and a first active region of a pixel area, and a second isolation and a second active region of a peripheral circuit area, forming a gate electrode film covering the first element isolation, the first active region, the second element isolation and the second active region, implanting an n-type impurity selectively into at least a part of the gate electrode film corresponding to the pixel area, and forming, after the implanting of the n-type impurity, a first gate electrode of the pixel area and a second gate electrode of the peripheral circuit area by patterning the gate electrode film. The part of the gate electrode film includes a portion located above a boundary between the first element isolation and the first active region.

PHOTO DETECTION SUBSTRATE, IMAGE SENSOR, AND ELECTRONIC APPARATUS
20250048756 · 2025-02-06 ·

A photo detection substrate, including: a base substrate; and a plurality of detection pixel units on the base substrate, where each detection pixel unit includes a signal reading circuit and a photoelectric conversion structure; the signal reading circuit includes at least one transistor each including a gate and an active layer pattern, the active layer pattern includes a channel region and a source/drain doped region; at least one transistor in the signal reading circuit is a superposed transistor on a side of the photoelectric conversion structure away from the base substrate, an orthographic projection of the active layer pattern of the superposed transistor on the base substrate overlaps an orthographic projection of the photoelectric conversion structure in the same detection pixel unit on the base substrate, and a material of the gate of the superposed transistor includes a transparent conductive material.

SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND IMAGING DEVICE
20250048758 · 2025-02-06 ·

To provide a semiconductor device configured to suppress impurities from diffusing in a lateral direction, a method of manufacturing the semiconductor device, and an imaging device in which the semiconductor device is used. The semiconductor device includes a semiconductor substrate, and a field effect transistor provided on a first main surface side of the semiconductor substrate. The field effect transistor includes an N-type region provided on the first main surface side of the semiconductor substrate and serving as at least a part of a source region or at least a part of a drain region, an insulating film provided on the N-type region, and an N-type semiconductor layer provided on the N-type region via the insulating film.

IMAGING DEVICE

An imaging device which does not include a color filter and does not need arithmetic processing using an external processing circuit is provided. A first circuit includes a first photoelectric conversion element, a first transistor, and a second transistor; a second circuit includes a second photoelectric conversion element, a third transistor, and a fourth transistor; a third circuit includes a fifth transistor, a sixth transistor, a seventh transistor, and a second capacitor; the spectroscopic element is provided over the first photoelectric conversion element or the second photoelectric conversion element; and the first circuit and the second circuit is connected to the third circuit through a first capacitor.

METHOD OF MANUFACTURING A CMOS IMAGE SENSOR
20170207270 · 2017-07-20 ·

A CMOS image sensor includes a semiconductor substrate, a plurality of pixel regions in the semiconductor substrate, a deep trench disposed between two adjacent pixel regions and filled with a polysilicon layer doped a first conductivity type, a plurality of well regions having a second conductivity type in each of the pixel regions, a through hole connected to the polysilicon material, and an metal interconnect layer connected to the through hole. The deep trench filled with the doped polysilicon layer completely isolates adjacent pixel regions. A voltage applied to the metal interconnect layer extracts excess photoelectrons generated by intensive incident light to improve the performance of the CMOS image sensor.

IMAGE SENSOR WITH GLOW SUPPRESSION OUTPUT CIRCUITRY

A charge-coupled device (CCD) image sensor is provided. The CCD image sensor may include an array of photosensors that transfer charge to multiple vertical CCD shift registers, which then in turn transfer the charge to a horizontal CCD shift register. The horizontal CCD shift register then feeds an output buffer circuit. The output buffer circuit can include multiple output stages, each of which can include a source-follower transistor coupled in series with a current sink transistor and at least one cascode transistor. The current sink transistor may have its gate terminal shorted to ground. In one arrangement, the cascode transistor has a gate terminal that receives a non-zero bias voltage. In another arrangement, the cascode transistor has a gate terminal that is also shorted to ground and operates in depletion mode.