After forming an absorber layer containing cracks over a back contact layer, a passivation layer is formed over a top surface of the absorber layer and interior surfaces of the cracks. The passivation layer is deposited in a manner such that that the cracks in the absorber layer are fully passivated by the passivation layer. An emitter layer is then formed over the passivation layer to pinch off upper portions of the cracks, leaving voids in lower portions of the cracks.

A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.

A method of manufacturing a solar cell is discussed. The method of manufacturing the solar cell includes: forming a conductive region on a semiconductor substrate; forming an electrode connected to the conductive region; and post-processing the semiconductor substrate to passivate the semiconductor substrate. The post-processing of the semiconductor substrate comprises a main processing process for heat-treating the semiconductor substrate while providing light to the semiconductor substrate. A temperature of the main processing process is about 100 C. to about 800 C., and the temperature and light intensity of the main processing process satisfy Equation of 175031.8.Math.T+(0.16).Math.T.sup.2I. Here, T is the temperate ( C.) of the main processing process, and I is the light intensity (mW/cm.sup.2) of the main processing process.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

A semiconductor device is disclosed, which includes: at least one device layer being a crystallized layer for example including: a superlattice layer and/or a layer of group III-V semiconductor materials; and a passivation structure comprising one or more layers wherein at least one layer of the passivation structure is a passivation layer grown in-situ in a crystallized form on top of the device layer, and at least one of the one or more layers of the passivation structure includes material having a high density of surface states which forces surface pinning of an equilibrium Fermi level within a certain band gap of the device layer, away from its conduction and valence bands.

One embodiment of the invention can provide a system for fabricating a photovoltaic structure. During fabrication, the system can form a sacrificial layer on a first side of a Si substrate; load the Si substrate into a chemical vapor deposition tool, with the sacrificial layer in contact with a wafer carrier; and form a first doped Si layer on a second side of the Si substrate. The system subsequently can remove the sacrificial layer; load the Si substrate into a chemical vapor deposition tool, with the first doped Si layer facing a wafer carrier; and form a second doped Si layer on the first side of the Si substrate.

Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers, and the resulting solar cells, are described. In an example, a back contact solar cell includes an N-type single crystalline silicon substrate having a light-receiving surface and a back surface. Alternating continuous N-type emitter regions and segmented P-type emitter regions are disposed on the back surface of the N-type single crystalline silicon substrate, with gaps between segments of the segmented P-type emitter regions. Trenches are included in the N-type single crystalline silicon substrate between the alternating continuous N-type emitter regions and segmented P-type emitter regions and in locations of the gaps between segments of the segmented P-type emitter regions. An approximately Gaussian distribution of P-type dopants is included in the N-type single crystalline silicon substrate below the segmented P-type emitter regions. A maximum concentration of the approximately Gaussian distribution of P-type dopants is approximately in the center of each of the segmented P-type emitter regions between first and second sides of each of the segmented P-type emitter regions. Substantially vertical P/N junctions are included in the N-type single crystalline silicon substrate at the trenches formed in locations of the gaps between segments of the segmented P-type emitter regions.

A manufacturing method of a solar cell having diffusion layers of different conductivity types on a front surface of a semiconductor substrate and a back surface thereof, respectively, includes a step of forming a diffusion protection mask containing impurities to cover at least a partial region of the semiconductor substrate, and a diffusion step of performing a diffusion step including a thermal step in a state where at least the partial region of the semiconductor substrate is covered with the diffusion protection mask containing impurities, forming a first-impurity diffusion layer in a first region covered with the diffusion protection mask, and forming a second-impurity diffusion layer having a different impurity concentration or a different conductivity type from that of the diffusion protection mask in a second region exposed from the diffusion protection mask.