A junction field effect transistor (JFET) comprises an insulating carrier substrate, a base semiconductor substrate formed on the insulating carrier substrate and a gate region formed on the base semiconductor substrate. The gate region forms a junction with the base semiconductor substrate. The JFET further comprises a first source/drain region formed on the base semiconductor substrate and located on a first side of the gate region and a second source/drain region formed on the base semiconductor substrate and located on a second side of the gate region. A gate stack is deposited on the gate region, a first source/drain stack is deposited on the first source/drain region and a second source/drain stack is deposited on the second source/drain region. At least one of the gate stack, first source/drain stack and second source/drain stack overlaps onto another one of the gate stack, first source/drain stack and second source/drain stack.

A junction field effect transistor (JFET) comprises an insulating carrier substrate, a base semiconductor substrate formed on the insulating carrier substrate and a gate region formed on the base semiconductor substrate. The gate region forms a junction with the base semiconductor substrate. The JFET further comprises a first source/drain region formed on the base semiconductor substrate and located on a first side of the gate region and a second source/drain region formed on the base semiconductor substrate and located on a second side of the gate region. A gate stack is deposited on the gate region, a first source/drain stack is deposited on the first source/drain region and a second source/drain stack is deposited on the second source/drain region. At least one of the gate stack, first source/drain stack and second source/drain stack overlaps onto another one of the gate stack, first source/drain stack and second source/drain stack.

A method for fabricating a semiconductor device comprises patterning a strained fin from a strained layer of semiconductor material arranged on a substrate, depositing a first layer of semiconductor material on the fin and exposed portions of the substrate, patterning and etching to remove a portion of the first layer of semiconductor material and a portion of the fin to expose a portion of the substrate, depositing a second layer of semiconductor material on exposed portions of the substrate and the first layer of semiconductor material, and patterning and etching to remove a portion of the second layer of semiconductor material layer and the first layer of semiconductor material to define a dummy gate stack, the dummy gate stack is operative to substantially maintain the strain in the strained fin.

An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO.sub.3(ZnO).sub.m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.

Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor.

A semiconductor device includes a substrate including a fin-shaped active region that protrudes from the substrate, a gate insulating film covering a top surface and both side walls of the fin-shaped active region, a gate electrode on the top surface and the both side walls of the fin-shaped active region and covering the gate insulating film, one pair of insulating spacers on both side walls of the gate electrode, one pair of source/drain region on the fin-shaped active region and located on both sides of the gate electrode, and a lower buffer layer between the fin-shaped active region the source/drain region. The source/drain regions include a compound semiconductor material including atoms from different groups. The lower buffer layer includes a compound semiconductor material that is amorphous and includes atoms from different groups.

A method of making a bipolar transistor includes forming an extrinsic base layer over an oxide layer on a substrate. After an emitter window is opened in the extrinsic base layer, a sidewall spacer is formed on the sidewall of the emitter window. After forming the sidewall spacer, the oxide layer may be etched away to expose the substrate and to form a cavity extending beneath the extrinsic base layer. Subsequently, a monocrystalline emitter is formed in the emitter window whereby a peripheral part of the monocrystalline emitter fills the cavity. An anneal is then performed to form an emitter diffusion region and a base link region of the bipolar transistor.

A display device includes a display element, a transistor configured to drive the display element, the transistor including a channel region, and a retention capacitor. An oxide semiconductor film is provided in areas across the transistor and the retention capacitor, the oxide semiconductor film including a first region formed in the channel region of the transistor, and a second region having a lower resistance than that of the first region. The second region is formed in the areas of the transistor and retention capacitor other than in the channel region.

A semiconductor device comprising a first metal oxide film, an oxide semiconductor film, a second metal oxide film, a gate insulating film, and a gate electrode is provided. The oxide semiconductor film comprises an InGaZnO-based metal oxide. The second metal oxide film comprises a GaZnO-based metal oxide. An amount of substance of zinc oxide with respect to gallium oxide is lower than 50% in the GaZnO-based metal oxide.

Disclosed is a semiconductor device having a memory cell which comprises a transistor having a control gate and a storage gate. The storage gate comprises an oxide semiconductor and is able to be a conductor and an insulator depending on the potential of the storage gate and the potential of the control gate. Data is written by setting the potential of the control gate to allow the storage gate to be a conductor, supplying a potential of data to be stored to the storage gate, and setting the potential of the control gate to allow the storage gate to be an insulator. Data is read by supplying a potential for reading to a read signal line connected to one of a source and a drain of the transistor and detecting the change in potential of a bit line connected to the other of the source and the drain.