A display panel and a display device including the display panel are provided. The display panel includes data lines and scan lines arranged to be intersected, and a sensing antenna. The data lines and the scan lines are located in a display region of the display panel, and define multiple sub-pixels. The sensing antenna includes multiple sensing coils and is at least partly located in the display region of the display panel, and projections of the data lines and/or the scan lines cover projections of the sensing coils in a direction perpendicular to a surface of the display panel, in order to avoid affection on an aperture ratio of the display panel caused by the sensing coils located in the display region.

A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes a first seal ring and a first circuit. The first circuit includes a first capacitor and a first inductor connected in series. The first circuit is connected between the first seal ring and a ground.

A device includes an insulating layer disposed over a silicon substrate. The insulating layer includes a core insulating area and a peripheral insulating area. A trench laterally encloses the core insulating area and separates the core insulating area from the peripheral insulating area. A magnetic winding coil is disposed within the trench and separates the core insulating area from the peripheral insulating area. A conductive inner core is disposed within the core insulating area and is surrounded by the magnetic winding coil. The conductive inner core is made of a first material that is electrically conductive, and the magnetic winding coil is made of a second material that is magnetic and differs from the first material.

A package includes a device die, and an encapsulating material encapsulating the device die therein. The encapsulating material has a top surface coplanar with a top surface of the device die. A coil extends from the top surface to a bottom surface of the encapsulating material, and the device die is in the region encircled by the coil. At least one dielectric layer is formed over the encapsulating material and the coil. A plurality of redistribution lines is in the at least one dielectric layer. The coil is electrically coupled to the device die through the plurality of redistribution lines.

Embodiments of an apparatus are disclosed that includes a first three dimensional (3D) inductor and a second 3D inductor. The first three dimensional (3D) inductor has a first conductive path shaped as a first two dimensional (2D) lobe laid over a first 3D volume. In addition, the second 3D inductor has a second conductive path, wherein the second 3D inductor is inserted into the first 3D inductor so that the second conductive path at least partially extends through the first 3D volume. Since second 3D inductor is inserted into the first 3D inductor, the 3D inductors may be coupled to one another. Depending on orientation and distances of structures provided by the 3D inductors, the 3D inductors may be weakly or moderately coupled.

Transistors can be used for a variety of electronic-based applications. Therefore, transistor efficiency and performance is of importance. An apparatus is presented herein to increase the locking range of transistors by leveraging cross-coupled injection transistors in conjunction with symmetry injection transistors. The transistor efficiency can also be increase by reducing a parasitic capacitance associated with the components of the transistor.

In accordance with the disclosed semiconductor chip and multi-chip module, signal transmission is made possible between semiconductor chips that are placed on a plane so as to be adjacent to each other through inductive coupling without affecting other coils such as in an oscillation circuit or an antenna circuit for RF communication. A multilayer solenoid coil, where a plane of the coil formed in a multilayer wiring structure in a semiconductor body is parallel to a main surface of the semiconductor body, is formed along at least one side end surface of the semiconductor body.

An electrical isolator packaging structure and a manufacturing method of an electrical isolator are provided. The electrical isolator packaging structure includes a first substrate, a second substrate, a coil, and a magnetic field (MF) sensor. The coil is disposed on the first substrate. The MF sensor is disposed on the second substrate. The position of the coil is arranged according to the position of the MF sensor such that the coil transmits a signal to the MF sensor. Thus, the electrical isolator can be implemented by magnetic coupling with the coil and the MF sensor.

Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET), forming one or more electrical connections to the FET, forming one or more dielectric layers over at least a portion of the electrical connections, and disposing an electrical element at least partially above the one or more dielectric layers, the electrical element being in electrical communication with the FET via the one or more electrical connections. RF device fabrication further involves applying an interface material over at least a portion of the one or more dielectric layers, removing at least a portion of the interface material to form a trench above at least a portion of the electrical element, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity, the electrical element being disposed at least partially within the cavity.