Patent classifications
H10D86/01
Display substrate, manufacturing method thereof, and display device
The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel includes a plurality of sub-pixels, and each sub-pixel includes a first active layer, a first gate insulation layer, a gate electrode, a second gate insulation layer, a second active layer, a first insulation layer, a source electrode and a drain electrode laminated one on another. The source electrode is connected with the first active layer through a via hole penetrating through the first insulation layer, the second gate insulation layer and the first gate insulation layer, and the source electrode and the drain electrode are connected with the second active layer through a via hole penetrating through the first insulation layer.
Display substrate, display panel and manufacturing method of display substrate
The embodiment of the present application discloses a display substrate, a display panel and a manufacturing method of the display substrate. The display substrate comprises a base substrate and a composite structure layer. The composite structure layer comprises a conductive layer and a colloidal medium layer. The colloidal medium layer comprises a plurality of conductive particles. The plurality of conductive particles are located at a position of the colloidal medium layer close to the conductive layer to form a conductive particle part. The present application can reduce the height difference between the conductive layer and the edge of the conductive particle part, and reduce the risk of fracture or breakdown.
Display panel and method of fabricating the same
A display panel includes: a base layer; a signal line disposed on the base layer, the signal line including: a first layer including aluminum; and a second layer directly disposed on the first layer, the second layer including a niobium-titanium alloy; a first thin film transistor connected to the signal line; a second thin film transistor disposed on the base layer; a capacitor electrically connected to the second thin film transistor; and a light emitting element electrically connected to the second thin film transistor.
Radio-frequency switching devices having improved voltage handling capability
Radio-frequency (RF) switching devices having improved voltage handling capability. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series to form a stack between the first terminal and the second terminal. The switching elements can have a non-uniform distribution of a parameter that results in the stack having a first voltage handling capacity that is greater than a second voltage handling capacity corresponding to a similar stack having a substantially uniform distribution of the parameter.
Radio-frequency switching devices having improved voltage handling capability
Radio-frequency (RF) switching devices having improved voltage handling capability. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series to form a stack between the first terminal and the second terminal. The switching elements can have a non-uniform distribution of a parameter that results in the stack having a first voltage handling capacity that is greater than a second voltage handling capacity corresponding to a similar stack having a substantially uniform distribution of the parameter.
Display device and method of manufacturing the same
A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.
Semiconductor device
A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.
Integration of microdevices into system substrate
In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The microdevices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.
Mechanisms for forming FinFET device
Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a substrate. The semiconductor device also includes a first fin and a second fin over the substrate. The semiconductor device further includes a first gate electrode and a second gate electrode traversing over the first fin and the second fin, respectively. In addition, the semiconductor device includes a gate dielectric layer between the first fin and the first gate electrode and between the second fin and the second gate electrode. Further, the semiconductor device includes a dummy gate electrode over the substrate, and the dummy gate electrode is between the first gate electrode and the second gate electrode. An upper portion of the dummy gate electrode is wider than a lower portion of the dummy gate electrode.
Semiconductor structure with a second isolation dam and manufacturing method thereof
A semiconductor structure includes a semiconductor substrate, a first isolation dam, a plurality of switching transistors and a second isolation dam. The semiconductor substrate includes a trench, an isolation region formed by a region where the trench is located, a plurality of active regions defined by the isolation region, and an electrical isolation layer, the electrical isolation layer being located on one side, away from an opening of the trench, of the trench; the first isolation dam fills the trench; the switching transistor is at least partially embedded in the active region of the semiconductor substrate; and the second isolation dam is at least partially located between the first isolation dam and the electrical isolation layer.