Embodiments of the present application provide a display panel, a display device, and a method for manufacturing the display panel. The display panel includes a substrate, a light emitter, a first electrode and a light collimating unit. The light emitter is on a side of the substrate. The first electrode is on a side of the light emitter away from the substrate. The light collimator is on a side of the first electrode away from the substrate, and the light collimator includes at least one microstructure, in a direction away from the substrate, a cross-sectional area of each of the at least one microstructure decreases.

In an embodiment an optoelectronic arrangement includes at least one vertical optoelectronic device with a first side and a second side, wherein at least parts of the second side form a main emission surface, and wherein the optoelectronic device is configured to emit light of a first wavelength from the main emission surface, an electrically conductive barrier structure at least partially surrounding the at least one vertical optoelectronic device and comprising sidewalls with a reflective surface, the reflective surface electrically isolated from sidewalls of the vertical optoelectronic device, a layer stack arranged on and bonded to the main emission surface and comprising a first epitaxially grown converter layer configured to convert the light of the first wavelength to light of a second wavelength and an optional conductive layer arranged on the main emission surface and electrically connecting a second contact with the electrically conductive barrier structure.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

A display device includes a first region and a second region each including a plurality of pixels, and a plurality of wires connected to the plurality of pixels, respectively, to transmit a signal, where the number of pixels per unit area in the second region is less than the number of pixels per unit area in the first region, and the number of wires per unit area in the second region is less than the number of wires per unit area in the first region.

A display apparatus and a method for manufacturing the same is disclosed according to the present application, which relates to the technical field of semiconductor apparatus. The method includes following steps: providing a display device, where the display device includes multiple pixel points arranged in an array, and the pixel points emit a first-color light; forming a grid layer above the pixel points, where the grid layer includes multiple grid holes arranged in an array, the grid holes are arranged relative to the pixel points, and the first-color light passes through the grid holes; forming a wavelength conversion layer above the grid layer, where the wavelength conversion layer includes multiple first wavelength conversion units, which fill in at least part of the grid holes and convert the first-color light into a second-color light.

The invention disclosed a preparation method for a high-voltage LED device integrated with a pattern array, comprising the following process steps: providing a substrate, and forming a N-type GaN limiting layer, an epitaxial light-emitting layer and a P-type GaN limiting layer on the substrate in sequence; isolating the N-GaN limiting layer, the epitaxial light-emitting layer and the P-GaN limiting layer on the substrate into at least two or more independent pattern units by means of photo lithography and etching process, wherein each of the pattern unit is in a triangular shape, and very two adjacent pattern units are arranged in an opposing and crossed manner to form a quadrangle, and the quadrangles formed by a plurality of adjacent pattern units are distributed in array; and connecting each pattern unit with metal wires to form a series connection and/or a parallel connection, thereby forming a plurality of interconnected LED chips. For the purpose of improving the current distribution so as to increase the luminescent efficiency of the device, a current blocking layer is also arranged beneath the P-type metal contact of each unit; in addition, an insulation material is also arranged to cover the surface of the chip so as to achieve the purposes of protecting the chip and increasing the light extraction efficiency of the chip.

In at least one embodiment, the method is designed for producing a light-emitting diode display (1). The method comprises the following steps: A) providing a growth substrate (2); B) applying a buffer layer (4) directly or indirectly onto a substrate surface (20); C) producing a plurality of separate growth points (45) on or at the buffer layer (4); D) producing individual radiation-active islands (5), originating from the growth points (45), wherein the islands (5) each comprise an inorganic semiconductor layer sequence (50) with at least one active zone (55) and have a mean diameter, when viewed from above onto the substrate surface (20), between 50 nm and 20 m inclusive; and E) connecting the islands (5) to transistors (6) for electrically controlling the islands (5).

Disclosed are a light emitting diode and a light emitting diode module. The light emitting diode module includes a printed circuit board and a light emitting diode joined thereto through a solder paste. The light emitting diode includes a first electrode pad electrically connected to a first conductive type semiconductor layer and a second electrode pad connected to a second conductive type semiconductor layer, wherein each of the first electrode pad and the second electrode pad includes at least five pairs of Ti/Ni layers or at least five pairs of Ti/Cr layers and the uppermost layer of Au. Thus a metal element such as Sn in the solder paste is prevented from diffusion so as to provide a reliable light emitting diode module.

A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method can include: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, in which a metallic layer is disposed in the TFT region for electrical connection of the TFT; and a light absorbing layer configured to absorb at least part of light propagating toward the metallic layer is disposed on the metallic layer between the metallic layer and one of a gate insulating layer, an active layer, an interlayer dielectric layer and a substrate.