A high voltage LED flip chip includes two or more regions; a Mesa-platform, the Mesa-platform in each region has a first groove; a first electrode located on the Mesa-platform, an area between the first electrodes in two adjacent regions forms a second groove; a first insulation layer covering the Mesa-platforms and the first electrodes, the first insulation layer fills the second groove and partially fills the first groove, and a part of the first groove which is not filled forms a third groove; a fourth groove formed in the first insulation layer, the fourth groove exposes a surface of the first electrode; and an interconnection electrode, the interconnection electrode comprises a first portion connecting the first semiconductor layer through the third groove in a particular region with the first electrode through the fourth groove in another region adjacent to the particular region. The LED formed has improved performance.

A method for manufacturing a micro LED display is provided. The method includes providing a plurality of LED elements on a first substrate, transferring, using a magnetic holder or a vacuum holder, at least two of the plurality of LED elements of the same primary color from the first substrate to a second substrate, performing the steps of the providing and the transferring with respect to three primary colors, forming an array of RGB LED units on the second substrate, each of the array of RGB LED units including a red LED element, a green LED element, and a blue LED element, interposing the array of RGB LED units between the second substrate and an LED driver wafer, detaching the second substrate from the array of RGB LED units, and interposing the array of RGB LED units between the LED driver wafer and a cover.

A vertical current mode solid state device comprising a connection pad and side walls comprising a metal-insulator-semiconductor (MIS) structure, wherein leakage current effect of the vertical device is limited through the side walls by biasing the MIS structure.

A light emitting device includes a substrate and a plurality of light emitting cells disposed on the substrate. Each light emitting cell includes a first semiconductor layer and a second semiconductor layer, an active layer between the first and the second semiconductors, a conductive material on the second semiconductor layer, an inclined surface, a first insulation layer overlaps each light emitting cell, an electrically conductive material overlaps the first insulation layer to couple two of the plurality of light emitting cells, and a second insulation layer overlaps the electrically conductive material. A light-transmitting material is used in both the first insulation layer and the second insulation layer. The inclined surface is continuous and has a slope of approximately 20 to approximately 80 from a horizontal plane based on the substrate.

System for wafer-level phosphor deposition. A method for phosphor deposition on a semiconductor wafer that has a plurality of LED dies includes the operations of covering the semiconductor wafer with a selected thickness of photo resist material, removing portions of the photo resist material to expose portions of the semiconductor wafer so that electrical contacts associated with the plurality of LED dies remain unexposed, and depositing phosphor on the exposed portions of the semiconductor wafer.

The present application relates to a light emitting device package. The light emitting device package includes a package substrate in which a via hole is formed. An electrode layer extends to both surfaces of the package substrate after passing through the via hole. A light emitting device is arranged on the package substrate and is connected to the electrode layer. A fluorescence film includes a first part that fills at least a part of an internal space of the via hole and a second part that covers at least a part of the light emitting device.

A light-emitting device configured to electrically connect to an external circuit and having: a first light-emitting structure; a second light-emitting structure; a first conductive structure having a first connecting pad having a side surface and a top surface connected to the first light-emitting structure and an exposed bottom surface, and a first connecting portion extending away from the side surface without being directly connected to the second light-emitting structure; and a second conductive structure electrically connecting the first light-emitting structure and second light-emitting structure.

The present invention relates to an array-type double-side light-emitting device, a manufacturing method thereof and a double-side display device. The array-type double-side light-emitting device comprises: a first protective layer, a first fluorescent layer or quantum dot layer, an array of first transparent conductive layers, a first anisotropic conductive adhesive layer, an array of light-emitting wafers, a second anisotropic conductive adhesive layer, an array of second transparent conductive layers, a second fluorescent layer or quantum dot layer and a second protective layer, which are attached together sequentially.

An LED lighting apparatus may comprise a white light emitting module including a first white LED package emitting first white light corresponding to a quadrangular region defined by (0.3100, 0.3203), (0.3082, 0.3301), (0.3168, 0.3388) and (0.3179, 0.3282) in the CIE 1931 chromaticity diagram, a second white LED package emitting second white light corresponding to a quadrangular region defined by (0.4475, 0.3994), (0.4571, 0.4173), (0.4695, 0.4207) and (0.4589, 0.4021) in the CIE 1931 chromaticity diagram, a green LED package emitting green light having a peak wavelength of 520 nm to 545 nm, and a driving controller controlling levels of luminous flux of the first white light and the second white light to select a color temperature of desired white light and controlling a luminous flux of the green LED package so as to reduce a difference between color coordinates corresponding to the selected color temperature of the white light, and a black body locus.

In embodiments of an imaging structure with embedded light sources, an imaging structure includes a silicon backplane with a driver pad array. The embedded light sources are formed on the driver pad array in an emitter material layer, and the embedded light sources can be individually controlled at the driver pad array to generate and emit light. A conductive material layer over the embedded light sources forms a p-n junction between the emitter material layer and the conductive material layer. Micro lens optics can be positioned over the conductive material layer to direct the light that is emitted from the embedded light sources. Further, the micro lens optics may be implemented as parabolic optics to concentrate the light that is emitted from the embedded light sources.