A gate drive circuit for a power semiconductor device, a low-side switching circuit, a high-side switching circuit, and a drive method are disclosed. When a first gate driver receives a control signal which is at a first level, the first gate driver connects a first gate to a first voltage, so that the first gate controls a channel region. When the transistor operates on a Miller plateau, the area of an overlapping region between the first gate and a drain inside the transistor is relatively small, so the Miller capacitance of the transistor is relatively small, thereby improving the switching speed of the transistor. A second gate is connected to a second voltage after a first duration, so that the second gate controls a drift region of the transistor to form an accumulation layer, and the accumulation layer has a relatively high carrier concentration.

An integrated circuit transistor device includes a semiconductor substrate providing a drain, a first doped region in the semiconductor substrate providing a source and a second doped region buried in the semiconductor substrate providing a body. A trench extends into the semiconductor substrate and passes through the first and second doped regions. An insulated polygate region within the trench surrounds a polyoxide region. The polygate region is formed by a first gate lobe and second gate lobe on opposite sides of the polyoxide region and a gate bridge over the polyoxide region. At a first region the gate bridge has a first thickness, and at a second region the gate bridge has a second thickness (greater than the first thickness). At the second region, a gate contact is provided at each trench to extend partially into the second thickness of the gate bridge.

A semiconductor device is provided. The semiconductor device includes a substrate and a gate structure. The gate structure is disposed in the substrate and includes a shielded gate, a control gate, and a plurality of insulating layers. The shielded gate includes a bottom gate and a top gate. The bottom gate includes a step structure consisting of a plurality of electrodes. A width of the electrode is smaller as the electrode is farther away from the top gate, and a width of the top gate is smaller than a width of the electrode closest to the top gate. The control gate is disposed on the shielded gate. A first insulating layer is disposed between the shielded gate and the substrate. A second insulating layer is disposed on the shielded gate. A third insulating layer is disposed between the control gate and the substrate.

A semiconductor device includes: a plurality of transistor cells formed in a semiconductor body. The plurality of transistor cells includes: a plurality of stripe-shape gate trenches formed in a first main surface of the semiconductor body; and a plurality of field plate trenches separate from the stripe-shape gate trenches. At least one field plate trench is laterally interposed between each pair of neighboring stripe-shape gate trenches. Each stripe-shape gate trench includes a gate electrode, a gate dielectric between the gate electrode and a sidewall of the stripe-shape gate trench, and an oxide between the gate electrode and a bottom of the stripe-shape gate trench, the oxide having a vertical thickness that is greater than eight times a lateral thickness of the gate dielectric and/or greater than a vertical thickness of the gate electrode. A method of producing the semiconductor device is also described.

The present disclosure provides a split gate MOSFET and a manufacturing method thereof. An epitaxy layer with a first conductivity type is formed on a substrate. A plurality of trenches are formed in the epitaxy layer. Impurities with a second conductive type is implanted and driven to the trenches to form a plurality of first doping areas. Since the first doping areas and none-doping areas of the epitaxy layer are alternately arranged with each other, and the first conductive type and the second conductive type are different conductivity types selected from P type or N type, the split gate MOSFET including the super junction structure is manufactured, and the advantages of simplifying manufacturing process, reducing cost and greatly reducing the on-resistance are achieved.

A semiconductor device includes a substrate, a dummy gate structure, and a gate structure. The substrate has a dummy gate trench and a gate trench, and includes a first well region, a second well region and a source region. The first well region is formed by doping at least one element from a first element group, and has a first conductive channel. The second well region is formed by doping at least one element from a second element group, the second well region is on the first well region and has a second conductive channel, a polarity of the second conductive channel is opposite to that of the first conductive channel. The dummy gate structure is in the dummy gate trench of the substrate, and a portion of the dummy gate structure is in the first well region. The gate structure is between the adjacent dummy gate structures.

A microelectronic device includes a doped region of semiconductor material having a first region and an opposite second region. The microelectronic device is configured to provide a first operational potential at the first region and to provide a second operational potential at the second region. The microelectronic device includes field plate segments in trenches extending into the doped region. Each field plate segment is separated from the semiconductor material by a trench liner of dielectric material. The microelectronic device further includes circuitry electrically connected to each of the field plate segments. The circuitry is configured to apply bias potentials to the field plate segments. The bias potentials are monotonic with respect to distances of the field plate segments from the first region of the doped region.

A semiconductor device according to an embodiment includes first to third semiconductor regions, a structure body, a gate electrode, and a high resistance part. The structure body includes an insulating part and a conductive part. The insulating part is arranged with the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region. The conductive part is located in the insulating part. The conductive part includes a portion facing the first semiconductor region. The high resistance part is located in the first semiconductor region and has a higher electrical resistance than the first semiconductor region. A plurality of the structure bodies includes first to third structure bodies. The second and third structure bodies are next to the first structure body. The high resistance part overlaps a circle center of an imaginary circle passing through centers of the first to third structure bodies.

Provided is a semiconductor device including a portion which operates as a transistor, in which the transistor includes a gate trench portion to which a gate voltage is applied, an emitter region in contact with the gate trench portion, and a base region in contact with the gate trench portion, and a threshold voltage at which the transistor transits from an off state to an on state in an ambient temperature of 25 C. is larger than a half of a first voltage for turning on the transistor.

The reliability of the semiconductor device is improved. A field plate electrode FP is formed inside the trench TR via an insulating film IF1. The other part of the field plate electrode FP is selectively retracted toward the bottom of the trench TR so that a part of the field plate electrode FP remains as a lead-out part FPa. A silicon oxide film OX1 is formed on the upper surface of the field plate electrode FP by thermal oxidation. The insulating film IF1 located on the upper surface TS of the semiconductor substrate SUB and the silicon oxide film OX1 are removed, and the insulating film IF1 is retracted so that its upper surface position is lower than the upper surface position of the field plate electrode FP.