An embodiment comprises: a guide moving in the vertical direction or the horizontal direction; a transfer arm provided on the guide and loading spaced apart wafers; a laser emission unit disposed on the guide and emitting first laser beams at the spaced apart wafers loaded on the transfer arm; and a laser detection unit disposed below the transfer arm and collecting, from among the first laser beams, second laser beams having passed through gaps between the spaced apart wafers.

A method is provided. The method includes one or more of extracting a die from an original packaged integrated circuit, modifying the extracted die, reconditioning the modified extracted die, placing the reconditioned die into a cavity of a hermetic package base, bonding a plurality of bond wires between reconditioned die pads of the reconditioned die to leads of the hermetic package base or downbonds to create an assembled hermetic package base, and sealing a hermetic package lid to the assembled hermetic package base to create a new packaged integrated circuit. Modifying the extracted die includes removing the one or more ball bonds on the one or more die pads. Reconditioning the modified extracted die includes adding a sequence of metallic layers to bare die pads of the modified extracted die. The extracted die is a fully functional semiconductor die with one or more ball bonds on one or more die pads of the extracted die.

A method for controlling a substrate temperature in a substrate processing system includes determining a temperature difference between the substrate temperature before the substrate is loaded onto a substrate support device and a desired temperature for the substrate support device and, during a first period, controlling a thermal control element to adjust the temperature of the substrate support device to a temperature value based on the temperature difference. The temperature value is not equal to the desired temperature for the substrate support device. The method further includes loading the substrate onto the substrate support device after the first period begins and before the temperature of the substrate support device returns to the desired temperature and, during a second period that follows the first period, controlling the temperature of the substrate support device to the desired temperature for the substrate support device.

In one embodiment, a semiconductor manufacturing apparatus includes an electrostatic chuck that includes a base and a first electrode provided on the base and is configured to electrostatically adsorb a wafer on the first electrode. The apparatus further includes a measurement module configured to measure potential of the wafer. The apparatus further includes a controller configured to adjust potential of the base based on the potential of the wafer and to adjust potential of the first electrode based on the potential of the wafer or the base, when the potential of the wafer measured by the measurement module changes.

In accordance with a method of manufacturing CZ silicon wafers, a parameter of at least two of the CZ silicon wafers is measured. A group of the CZ silicon wafers falling within a tolerance of a target specification is determined. The group of the CZ silicon wafers is divided into sub-groups taking into account the measured parameter. An average value of the parameter of the CZ silicon wafers of each sub-group differs among the sub-groups, and a tolerance of the parameter of the CZ silicon wafers of each sub-group is smaller than a tolerance of the parameter of the target specification. A labeling configured to distinguish between the CZ silicon wafers of different sub-groups is prepared. The CZ silicon wafers falling within the tolerance of the target specification are packaged.

The present application discloses a separating apparatus for separating an object to be separated including two plate-shaped structures stacked on each other. The separating apparatus includes: an electrical signal generating unit and an acoustic wave signal output unit connected to each other, the electrical signal generating unit is configured to generate a target electrical signal; and the acoustic wave signal output unit is configured to convert the target electrical signal into a target acoustic wave, and output the target acoustic wave to the object to be separated, wherein a frequency of the target acoustic wave is different from a natural frequency of any one of the two plate-shaped structures.

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.

A polishing assembly for polishing of silicon wafers includes a polishing pad, a polishing head assembly, a temperature sensor, and a controller. The polishing head assembly holds a silicon wafer to position the silicon wafer in contact with the polishing pad. The polishing head assembly selectively varies a removal profile of the silicon wafer. The temperature sensor collects thermal data from a portion of the polishing pad. The controller is communicatively coupled to the polishing head assembly and the temperature sensor. The controller receives the thermal data from the temperature sensor and operates the polishing head assembly to selectively vary the removal profile of the silicon wafer based at least in part on the thermal data.

As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of the electrode pads of a TEG so as to facilitate the evaluation of electrical characteristics. According to an evaluation apparatus for a semiconductor device of the present invention, the above described problems can be solved by providing a plurality of probes arranged in a fan shape or probes manufactured by Micro Electro Mechanical Systems (MEMS) technology.