The present invention relates to a method of manufacturing a separable semiconductor substrate, and a thin film device and composite device manufactured by the same, and the method of manufacturing a separable semiconductor substrate according to an embodiment of the present invention includes providing a substrate and forming a buffer layer including carbon and aluminum nitride.

A screen based on emissive pixels for an aircraft cockpit, including a flat substrate bearing a plurality of electroluminescent diodes in the same emission spectrum and wherein each pixel is made up of at least one compact group of several of the electroluminescent diodes. In a pixel of the screen, the electroluminescent diodes of one of the groups are covered with a layer forming a cover common to the electroluminescent diodes of the group and relaying a diffuse light, with or without photoluminescence, in response to the emission of light by the electroluminescent diodes of the group.

Provided is a display apparatus that can suppress degradation of image quality caused by possible color drift. A display apparatus includes a board including a driving circuit based on a current amplitude modulation scheme, multiple first light emitting elements and multiple second light emitting elements two-dimensionally arranged on the board, and a wavelength correcting layer that is able to correct wavelengths of light emitted from the multiple first light emitting elements. The driving circuit is able to independently gamma-correct a first signal fed to the first light emitting element and a second signal fed to the second light emitting element.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

Provided are an ultraviolet light-emitting element that enables high light emission output and a method of producing the same. The light-emitting element (100) includes, in stated order: an n-type semiconductor layer (3) formed of Al.sub.xGa.sub.1-xN having an Al composition ratio x; a quantum well-type light-emitting layer (4); a p-type electron blocking layer (6) formed of Al.sub.yGa.sub.1-yN having an Al composition ratio y; a p-type cladding layer (7) formed of Al.sub.zGa.sub.1-zN having an Al composition ratio z; and a p-type GaN contact layer (8). The p-type electron blocking layer (6) has an Al composition ratio y of 0.35 to 0.45 and a thickness of 11 nm to 70 nm. The total thickness of the p-type electron blocking layer (6) and p-type cladding layer (7) is 73 nm to 100 nm. The thickness of the p-type GaN contact layer (8) is 5 nm to 15 nm.

This invention is related to LED Light Extraction for optoelectronic applications. More particularly the invention relates to (Al, Ga, In)N combined with optimized optics and phosphor layer for highly efficient (Al, Ga, In)N based light emitting diodes applications, and its fabrication method. A further extension is the general combination of a shaped high refractive index light extraction material combined with a shaped optical element.

A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the first semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulating layer overlapping the first semiconductor layer, the second semiconductor layer, and the reflection pattern, in which the insulating layer has a first region having different thicknesses and a second region having a substantially constant thickness.

A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al.sub.1-xGa.sub.xN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0x1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.

A template for a semiconductor device is made by providing an AGN substrate, growing a first layer of Group III nitrides on the substrate, depositing a thin metal layer on the first layer, annealing the metal such as gold so that it agglomerates to form a pattern of islands on the first layer; transferring the pattern into the first layer by etching then removing excess metal; and then depositing a second Group III nitride layer on the first layer. The second layer, through lateral overgrowth, coalesces over the gaps in the island pattern leaving a smooth surface with low defect density. A Group III semiconductor device may then be grown on the template, which may then be removed. Chlorine gas may be used for etching the pattern in the first layer and the remaining gold removed with aqua regia.