The present disclosure relates to an insect trap using an ultraviolet light-emitting diode (UV LED) lamp, and more particularly, to an insect trap using, in place of a conventional UV light source lamp, a UV LED lamp that significantly increases the insect trapping efficiency. The insect trap according to the present disclosure includes: a UV LED lamp disposed in an air inlet portion of the duct, and including a printed circuit board (PCB) that has a UV LED chip mounted thereon; an installing portion for installing the UV LED lamp on; and a trapping portion provided near the installing portion.

A display device including a plurality of semiconductor light emitting devices, each corresponding semiconductor light emitting device having a first conductive electrode, a second conductive electrode and a light-emitting surface configured to emit light; a first wiring line electrically connected to the first conductive electrode; and a second wiring line disposed to cross the first conductive electrode, and be electrically connected to the second conductive electrode. Further, the second wiring line is formed to surround a periphery of the light-emitting surface of the semiconductor light emitting devices to reflect light emitted by the light emitting devices toward a front surface of the display device.

A display device is provided. The display device includes a substrate and a light-emitting diode. The light-emitting diode includes first and second conductive-type semiconductor layers and a light-emitting layer. The second conductive-type semiconductor layer is adjacent to the substrate. The first conductive-type semiconductor layer includes a bulk portion and a reflection layer disposed over a side of the bulk portion. The bulk portion has a first surface away from the light-emitting layer and a second surface adjacent to the light-emitting layer. The second conductive-type semiconductor layer has a third surface adjacent to the light-emitting layer and a fourth surface away from the light-emitting layer. There is a specific relationship between the width of the first surface, the width of the light-emitting layer, the distance from the first surface to the fourth surface, and the distance from the first surface to the light-emitting layer.

Light emitting diodes and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode (LED) includes a substrate, a semiconductor material carried by the substrate, and an active region proximate to the semiconductor material. The semiconductor material has a first surface proximate to the substrate and a second surface opposite the first surface. The second surface of the semiconductor material is generally non-planar, and the active region generally conforms to the non-planar second surface of the semiconductor material.

A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

A flexible display includes a plurality of pixel chips, chixels, provided on a flexible substrate. The chixels and the light emitters thereon may be shaped, sized and arranged to minimize chixel, pixel, and sub-pixel gaps and to provide a desired bend radius of the display. The flexible substrate may include light manipulators, such as filters, light converters and the like to manipulate the light emitted from light emitters of the chixels. The light manipulators may be arranged to minimize chixel gaps between adjacent chixels.

Optical devices such as LEDs and lasers are discloses. The devices include a non-polar gallium nitride substrate member having an off-axis non-polar oriented crystalline surface plane. The off-axis non-polar oriented crystalline surface plane can be up to about 0.6 degrees in a c-plane direction and up to about 20 degrees in a c-plane direction in certain embodiments. In certain embodiments, a gallium nitride containing epitaxial layer is formed overlying the off-axis non-polar oriented crystalline surface plane. In certain embodiments, devices include a surface region overlying the gallium nitride epitaxial layer that is substantially free of hillocks.

High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm.sup.2.

The present invention relates to a light emitting diode (LED) chip, in which a hybrid sensor is formed in a nitride-based LED structure. A chip structure embedded with such a hybrid sensor functions as an LED light emitting sensor which can monitor environmental pollution while functioning as a lighting element at the same time and has an effect of being used as a variety of environment pollution sensors according to the type of an electrode material.

An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of the area of the opening region to the area of the masking region in the second region.