Patent classifications
H10H20/01335
METHOD FOR MANUFACTURING SEPARABLE SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR SUBSTRATE, THIN FILM DEVICE AND COMPOSITE DEVICE MANUFACTURED BY THE SAME
The present invention relates to a method of manufacturing a separable semiconductor substrate, and a thin film device and composite device manufactured by the same, and the method of manufacturing a separable semiconductor substrate according to an embodiment of the present invention includes providing a substrate and forming a buffer layer including carbon and aluminum nitride.
DIRECT-BONDED OPTOELECTRONIC DEVICES
Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.
ULTRAVIOLET LIGHT-EMITTING ELEMENT AND METHOD OF PRODUCING SAME
Provided are an ultraviolet light-emitting element that enables high light emission output and a method of producing the same. The light-emitting element (100) includes, in stated order: an n-type semiconductor layer (3) formed of Al.sub.xGa.sub.1-xN having an Al composition ratio x; a quantum well-type light-emitting layer (4); a p-type electron blocking layer (6) formed of Al.sub.yGa.sub.1-yN having an Al composition ratio y; a p-type cladding layer (7) formed of Al.sub.zGa.sub.1-zN having an Al composition ratio z; and a p-type GaN contact layer (8). The p-type electron blocking layer (6) has an Al composition ratio y of 0.35 to 0.45 and a thickness of 11 nm to 70 nm. The total thickness of the p-type electron blocking layer (6) and p-type cladding layer (7) is 73 nm to 100 nm. The thickness of the p-type GaN contact layer (8) is 5 nm to 15 nm.
Monolithic Optical Transformer
Provided are optical transformer devices having a high power efficiency. The device architecture provides uniform current spreading to minimize efficiency droop. The quantum well designs are optimized for both light-emitting diode (LED) and photo diode (PD) operation. A low-loss optical cavity allows efficient transfer of light from the LED junction to the PD junction. The architecture provides a low-loss voltage up- and down-conversion and provides compatibility with production-grade epitaxial growth and wafer fabrication processes.
Method for producing a light-emitting diode display and light-emitting diode display
In at least one embodiment, the method is designed for producing a light-emitting diode display (1). The method comprises the following steps: A) providing a growth substrate (2); B) applying a buffer layer (4) directly or indirectly onto a substrate surface (20); C) producing a plurality of separate growth points (45) on or at the buffer layer (4); D) producing individual radiation-active islands (5), originating from the growth points (45), wherein the islands (5) each comprise an inorganic semiconductor layer sequence (50) with at least one active zone (55) and have a mean diameter, when viewed from above onto the substrate surface (20), between 50 nm and 20 m inclusive; and E) connecting the islands (5) to transistors (6) for electrically controlling the islands (5).
Light emitting diode for surface mount technology, method of manufacturing the same, and method of manufacturing light emitting diode module
A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the first semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulating layer overlapping the first semiconductor layer, the second semiconductor layer, and the reflection pattern, in which the insulating layer has a first region having different thicknesses and a second region having a substantially constant thickness.
Semiconductor structure
A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al.sub.1-xGa.sub.xN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0x1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.
Nitride semiconductor element and method for manufacturing the same
A method of manufacturing a nitride semiconductor element includes dry etching a main surface of a sapphire substrate at a c-plane side thereof, using a mask provided on the main surface, to form a plurality of projections, each having a circular bottom surface; wet etching the sapphire substrate to form an upper part of each projection into a triangular pyramid shape while maintaining the circular bottom surface of the projection; and growing a semiconductor layer made of a nitride semiconductor on a dry etched surface and a wet etched surface of the sapphire substrate.
Bond and release layer transfer process
Embodiments transfer thin layers of material utilized in electronic devices (e.g., GaN for optoelectronic devices), from a donor to a handle substrate. Certain embodiments employ bond-and-release system(s) where release occurs along a cleave plane formed by implantation of particles into the donor. Some embodiments may rely upon release by converting components from solid to liquid under carefully controlled thermal conditions (e.g., solder-based materials and/or thermal decomposition of Indium-containing materials). Some embodiments utilize laser-induced film release processes using epitaxially grown or implanted regions as an optically absorptive region. A single bond-and-release sequence may involve processing an exposed N-face of GaN material. Multiple bond-and-release sequences (involving processing an exposed Ga-face of GaN material) may be employed in series, for example utilizing a temporary handle substrate as an intermediary. Particular embodiments form template blanks of high quality GaN suitable for manufacturing High Brightness-Light Emitting Diode (HB-LED) devices.
METHOD FOR OBTAINING PATTERNS IN A LAYER
The invention relates in particular to a method for producing subsequent patterns in an underlying layer (120), the method comprising at least one step of producing prior patterns in a carbon imprintable layer (110) on top of the underlying layer (120), the production of the prior patterns involving nanoimprinting of the imprintable layer (110) and leave in place a continuous layer formed by the imprintable layer (110) and covering the underlying layer (120), characterized in that it comprises the following step: at least one step of modifying the underlying layer (120) via ion implantation (421) in the underlying layer (120), the implantation (421) being carried out through the imprintable layer (110) comprising the subsequent patterns, the parameters of the implantation (421) being chosen in such a way as to form, in the underlying layer (120), implanted zones (122) and non-implanted zones, the non-Implanted zones defining the subsequent patterns and having a geometry that is dependent on the prior patterns.