A method of detecting an optical signal, comprising the steps of: providing an avalanche photodiode (APD) comprising a multiplication region capable of amplifying an electric current, said multiplication region, in operation, having a first ionization rate for electrons and a second ionization rate for holes, wherein said first ionization rate is different in magnitude from said second ionization rate, and exposure to the optical signal causes an impulse response; exposing the APD to a modulating optical signal; providing an external circuit that induces an APD bias to the multiplication region; providing an external circuit for amplifying and processing an electric signal from the avalanche photodiode; and modulating the APD bias in a manner that is correlated with the optical signal.

A processing apparatus includes a first storage unit for storing first array data that is based on output values of a plurality of pixels arranged in an array, a second storage unit having second array data stored therein to be used for correction of the output values from the plurality of pixels, and a correction unit including a calculation unit that corrects an output value of at least one pixel of the plurality of pixels based on the first array data and the second array data.

A method of detecting an optical signal, comprising the steps of: providing an avalanche photodiode (APD) comprising a multiplication region capable of amplifying an electric current, said multiplication region, in operation, having a first ionization rate for electrons and a second ionization rate for holes, wherein said first ionization rate is different in magnitude from said second ionization rate, and exposure to the optical signal causes an impulse response; exposing the APD to a modulating optical signal; providing an external circuit that induces an APD bias to the multiplication region; providing an external circuit for amplifying and processing an electric signal from the avalanche photodiode; and modulating the APD bias in a manner that is correlated with the optical signal.

An imaging sensor system includes a pixel array having a plurality of pixel cells disposed in a first semiconductor layer, where each one of the plurality of pixel cells has a single photon avalanche diode (SPAD) disposed proximate to a front side of a first semiconductor layer. Each of the plurality of pixel cells includes a guard ring disposed in the first semiconductor layer in a guard ring region proximate to the SPAD, and also includes a guard ring region reflecting structure disposed in the guard ring region proximate to the guard ring and proximate to the front side of the first semiconductor layer. The imaging sensor system also includes control circuitry coupled to the pixel array to control operation of the pixel array, and readout circuitry coupled to the pixel array to readout image data from the plurality of pixel cells.

An Si/Ge SACM avalanche photodiodes (APD) having low breakdown voltage characteristics includes an absorption region and a multiplication region having various layers of particular thicknesses and doping concentrations. An optical waveguide can guide infrared and/or optical signals or energy into the absorption region. The resulting photo-generated carriers are swept into the i-Si layer and/or multiplication region for avalanche multiplication. The APD has a breakdown bias voltage of well less than 12 V and an operating bandwidth of greater than 10 GHz, and is therefore suitable for use in consumer electronic devices, high speed communication networks, and the like.

The present disclosure relates to a semiconductor photomultiplier comprising a substrate; an array of photosensitive cells formed on the substrate that are operably coupled between an anode and a cathode. A set of primary bus lines are provided each being associated with a corresponding set of photosensitive cells. A secondary bus line is coupled to the set of primary bus lines. An electrical conductor is provided having a plurality of connection sites coupled to respective connection locations on the secondary bus line for providing conduction paths which have lower impedance than the secondary bus line.

A delay circuit is provided. The delay circuit includes a first regulator and a second regulator, each of which is independently selectable based on a selection signal applied to a selection terminal of the delay circuit. Furthermore, the delay circuit is configurable in one of two distinct delay resolution regimes, each corresponding to only one edge an input signal being actively delayed by the delay circuit when one of the first regulator and the second regulator is enabled and the other one of the first regulator and the second regulator is turned off.

A solid state photomultiplier includes at least one microcell configured to generate an initial analog signal when exposed to optical photons. The solid state photomultiplier further includes a quench circuit electrically coupled with the at least one microcell. The quench circuit includes at least one quench resistor configured to exhibit a substantially constant temperature coefficient of resistance over a selected temperature range.

A photon detector includes a single photon avalanche diode (SPAD) disposed proximate to a front side of a semiconductor layer. The SPAD includes a multiplication junction that is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the semiconductor layer triggers an avalanche multiplication process. A guard ring is disposed in a guard ring region that surrounds the SPAD to isolate the SPAD in the semiconductor layer. A guard ring region reflecting structure is disposed in the guard ring region proximate to the guard ring and proximate to the front side of the semiconductor layer such that light directed into the guard ring region through the backside of the semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the semiconductor layer and into the SPAD.

A circuit is provided. The circuit includes a single-photon avalanche diode. The circuit further includes a delay element comprising a first regulator and a second regulator, each of which is independently selectable based on a selection signal applied to a selection terminal of the delay element. The delay element is configured to receive, at an inverting section, an event signal indicative of an avalanche event in the single-photon avalanche diode. Furthermore, the delay element is configurable in one of two distinct delay resolution regimes, each corresponding to only one edge of the event signal being actively delayed by the delay element when one of the first regulator and the second regulator is enabled and the other one of the first regulator and the second regulator is turned off.