H10H20/824

NANOPILLAR MICROFLUIDIC DEVICES AND METHODS OF USE THEREOF

Described herein are microfluidic devices and methods of detecting an analyte in a sample that includes flowing the sample though a microfluidic device, wherein the presence of the analyte is detected directly from the microfluidic device without the use of an external detector at an outlet of the microfluidic device. In a more specific aspect, detection is performed by incorporating functional nanopillars, such as detector nanopillars and/or light source nanopillars, into a microchannel of a microfluidic device.

Group III nitride semiconductor light-emitting device
09755107 · 2017-09-05 · ·

The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission efficiency. The Group III nitride semiconductor light-emitting device includes a base layer, an n-type superlattice layer, a light-emitting layer, and a p-type cladding layer, each of the layers being made of Group III nitride semiconductor. An electron injection adjusting layer comprising a single Al.sub.xGa.sub.1-xN (0<x<1) layer and having a thickness of 5 to 30 is formed in the base layer. The n-type superlattice layer is a superlattice layer having a periodic structure of an In.sub.yGa.sub.1-yN (0<y<1) layer, an i-GaN layer, and an n-GaN layer. The electron injection adjusting layer has a thickness of 5 to 30 and an Al composition ratio of 0.15 to 0.5.

SOLID-STATE RADIATION TRANSDUCER DEVICES HAVING AT LEAST PARTIALLY TRANSPARENT BURIED-CONTACT ELEMENTS, AND ASSOCIATED SYSTEMS AND METHODS
20170250313 · 2017-08-31 ·

Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An SSRT device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material. The SSRT device can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. The second contact can include a plurality of buried-contact elements electrically coupled to the second semiconductor material. Individual buried-contact elements can have a transparent portion directly adjacent to the second semiconductor material. The second contact can further include a base portion extending between the buried-contact elements, such as a base portion that is least partially planar and reflective.

WIRING SUBSTRATE AND LIGHT EMITTING DEVICE
20170244015 · 2017-08-24 · ·

A wiring substrate includes ceramic layers and a conductive member. The ceramic layers have an uppermost ceramic layer and a lowermost ceramic layer. The conductive member includes an upper conductive layer, an internal conductive layer, a lower conductive layer, vias, and a covering layer. The upper conductive layer is disposed on an upper surface of the uppermost ceramic layer. The internal conductive layer is interposed between the ceramic layers. The lower conductive layer is disposed on a lower surface of the lowermost ceramic layer. The vias connect the upper conductive layer, the internal conductive layer, and the lower connective layer. The covering layer covers a portion of the upper conductive layer. The upper conductive layer includes a covered region covered with the covering layer and an element mount region. An upper surface of the element mount region is higher than an upper surface of the covered portion.

LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF

The present disclosure provides a light-emitting device and manufacturing method thereof. The light-emitting device comprises: a metal connecting structure; a barrier layer on the metal connecting structure, the barrier layer comprising a first metal multilayer on the metal connecting structure and a second metal multilayer on the first metal multilayer; a metal reflective layer on the barrier layer; and a light-emitting stack electrically coupled to the metal reflective layer, wherein the first metal multilayer comprises a first metal layer comprising a first metal material and a second metal layer comprising a second metal material, and the second metal multilayer comprises a third metal layer comprising a third metal material and a fourth metal layer comprising a fourth metal material.

Semiconductor heterostructure with stress management

A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

Monolithically integrated fluorescence on-chip sensor

After sequentially forming a first multilayer structure comprising a first set of semiconductor layers suitable for formation of a photodetector, an etch stop layer and a second multilayer structure comprising a second set of semiconductor layers suitable for formation of a light source over a substrate, the second multilayer structure is patterned to form a light source in a first region of the substrate. A first trench is then formed extending through the etch stop layer and the first multilayer structure to separate the first multilayer structure into a first part located underneath the light source and a second part that defines a photodetector located in a second region of the substrate. Next, an interlevel dielectric (ILD) layer is formed over the light source, the photodetector and the substrate. A second trench that defines a microfluidic channel is formed within the ILD layer and above the photodetector.

SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor light-emitting device, and a method of manufacturing the same. The semiconductor light-emitting device includes a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked on a substrate, a first contact that passes through the substrate to be electrically connected to the first electrode layer, and a second contact that passes through the substrate, the first electrode layer, and the insulating layer to communicate with the second electrode layer. The first electrode layer is electrically connected to the first semiconductor layer by filling a contact hole that passes through the second electrode layer, the second semiconductor layer, and the active layer, and the insulating layer surrounds an inner circumferential surface of the contact hole to insulate the first electrode layer from the second electrode layer.

ILLUMINATION METHOD AND LIGHT-EMITTING DEVICE
20170229620 · 2017-08-10 · ·

To provide an illumination method and a light-emitting device which are capable of achieving, under an indoor illumination environment where illuminance is around 5000 lx or lower when performing detailed work and generally around 1500 lx or lower, a color appearance or an object appearance as perceived by a person, will be as natural, vivid, highly visible, and comfortable as though perceived outdoors in a high-illuminance environment, regardless of scores of various color rendition metric. Light emitted from the light-emitting device illuminates an object such that light measured at a position of the object satisfies specific requirements. A feature of the light-emitting device is that light emitted by the light-emitting device in a main radiant direction satisfies specific requirements.

Semiconductor Component with a Multi-Layered Nucleation Body
20170229548 · 2017-08-10 ·

There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.