A semiconductor light emitting device includes a light emitting layer, a first electrode below the light emitting layer, a second electrode on the light emitting layer, and a passivation layer surrounding the light emitting layer. The size of the first electrode may be larger than the size of the light emitting layer.

Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.

A light emitting diode includes a first electrode, a second electrode, and an epitaxial structure. The epitaxial structure is arranged on the first electrode, and electrically connects with the first electrode and the second electrode. The second electrode surrounds periphery of the epitaxial structure to reflect light from the epitaxial structure out from the top of the epitaxial structure. A method for manufacturing the light emitting diode is also presented. The light emitting diode and the method increase lighting efficiency of the light emitting diode.

Disclosed are a light emitting device, a method of manufacturing a light emitting device, a light emitting device package and a lighting system. The light emitting device includes a substrate; a first conductive semiconductor layer on the substrate; an active layer on the first conductive semiconductor layer; a second conductive semiconductor layer on the active layer; a contact layer on the second conductive semiconductor layer; an insulating layer on the contact layer; a first branch electrode electrically connected to the first conductive semiconductor layer; a plurality of first via electrodes connected to the first branch electrode and electrically connected to the first conductive semiconductor layer by passing through the insulating layer; a first pad electrode electrically connected to the first branch electrode; a second pad electrode contacts the contact layer by passing through the insulating layer; a second branch electrode connected to the second pad electrode and disposed on the insulating layer; and a plurality of second via electrodes provided through provided through the insulating layer to electrically connect the second branch electrode to the contact layer.

A light emitting diode (LED) device and packaging for same is disclosed. In some aspects, the LED is manufactured using a vertical configuration including a plurality of layers. Certain layers act to promote mechanical, electrical, thermal, or optical characteristics of the device. The device avoids design problems, including manufacturing complexities, costs and heat dissipation problems found in conventional LED devices. Some embodiments include a plurality of optically permissive layers, including an optically permissive cover substrate or wafer stacked over a semiconductor LED and positioned using one or more alignment markers.

An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of the area of the opening region to the area of the masking region in the second region.

A light-emitting element, a light-emitting element unit and a light-emitting element package are provided, which are each reduced in reflection loss and intra-film light absorption by suppressing multiple light reflection in a transparent electrode layer and hence have higher luminance. The light-emitting element 1 includes a substrate 2, an n-type nitride semiconductor layer 3, a light-emitting layer 4, a p-type nitride semiconductor layer 5, a transparent electrode layer 6 and a reflective electrode layer 7, and the transparent electrode layer 6 has a thickness T satisfying the following expression (1):

[00001]$\begin{array}{cc}\frac{3.Math.}{4.Math.n}+0.30\left(\frac{}{4.Math.n}\right)T\frac{3.Math.}{4.Math.n}+0.45\left(\frac{}{4.Math.n}\right)& \left(1\right)\end{array}$

wherein is the light-emitting wavelength of the light-emitting element 4, and n is the refractive index of the transparent electrode layer 6.

A light emitting diode including a first light emitting cell and a second light emitting cell separated from each other on a substrate, a first transparent electrode layer electrically connected to the first light emitting cell, an interconnection electrically connecting the first light emitting cell to the second light emitting cell, and a first insulation layer. The first transparent electrode layer is disposed on an upper surface of the first light emitting cell and partially covers a side surface of the first light emitting cell. The first insulation layer separates the first transparent electrode layer from the side surface of the first light emitting cell, and includes an opening to expose a lower semiconductor layer of the first light emitting cell.

A semiconductor light emitting device includes a light emitting structure in the form of a rod, including a first conductivity-type semiconductor layer, an active layer and a second conductivity-type semiconductor layer, and having a first surface, a second surface opposing the first surface, and a side surface connecting the first and second surfaces; a regrowth semiconductor layer surrounding an entire side surface of the light emitting structure and having a first thickness in a first position along a perimeter of the side surface and a second thickness, different from the first thickness, in a second position along a perimeter of the side surface; a first electrode on the first surface of the light emitting structure and connected to the first conductivity-type semiconductor layer; and a second electrode on the second surface of the light emitting structure and connected to the second conductivity-type semiconductor layer.

A display device and a manufacturing method thereof are provided. The display device includes a display area and a non-display area. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and a light-emitting element. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer, and the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes; a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and is electrically connected to the electrodes of the electrode pattern layer.