A nitride semiconductor device includes: an electron transit layer; an electron supply layer that is formed on the electron transit layer and that has a band gap which is larger than that of the electron transit layer; a dielectric layer that is formed on the electron supply layer; and an electrode that has a contact part which is in electrical contact with the electron supply layer via at least an opening passing through the dielectric layer. The contact part has: an inclined surface that is inclined so as to decrease in width toward the electron transit layer; a tip surface that is in contact with the bottom face of the opening; and a curved surface that is provided between the tip surface and the inclined surface and that is curved so as to protrude toward the electron transit layer.

A nitride semiconductor device includes an electron transit layer, an electron supply layer disposed on the electron transit layer to generate two-dimensional electron gas in the electron transit layer, a gate layer containing acceptor impurities and disposed on the electron supply layer, a gate electrode contacting the gate layer, a source electrode, and a drain electrode. The gate layer includes a trench that is recessed from an upper surface of the gate layer in a region contacting the gate electrode. The trench includes a trench open end, a trench bottom surface, and a curved surface continuous with the trench bottom surface and curved from the trench bottom surface toward the trench open end.

A semiconductor device for power amplification includes a lower electrode, a semiconductor layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor layer is divided into an active region and an isolation region. A channel region includes unit channel regions that are separated by the isolation region. The source electrode includes unit source electrodes each of which faces a corresponding one of the unit channel regions. Unit source regions each include at least one source via that contains a conductor in contact with the lower electrode, the unit source regions each including a corresponding one of the unit source electrodes. In a plan view, a length of a side of a minimum rectangular region in an X-axis direction is greater than a length of a side of the minimum rectangular region in the Y-axis direction, the minimum rectangular region surrounding the at least one source via.

Structures for a high-electron-mobility transistor and methods of forming such structures. The structure comprises a device structure including a gate and an ohmic contact, and one or more inactive blocks laterally positioned between the gate and the ohmic contact.

A nitride semiconductor device 1 includes a first nitride semiconductor layer 4 that constitutes an electron transit layer, a second nitride semiconductor layer 5 that is formed on the first nitride semiconductor layer, is larger in bandgap than the first nitride semiconductor layer, and constitutes an electron supply layer, and a gate portion 20 that is formed on the second nitride semiconductor layer. The gate portion 20 includes a first semiconductor gate layer 21 of a ridge shape that is disposed on the second nitride semiconductor layer 5 and is constituted of a nitride semiconductor containing an acceptor type impurity, a second semiconductor gate layer 22 that is formed on the first semiconductor gate layer 21 and is constituted of a nitride semiconductor with a larger bandgap than the first semiconductor gate layer 21, and a gate electrode 23 that is formed on the second semiconductor gate layer 22 and is in Schottky junction with the second semiconductor gate layer 22.

A semiconductor device 1 has an electrode structure that includes source electrodes 3, a gate electrode 4, and drain electrodes 5 disposed on a semiconductor laminated structure 2 and extending in parallel to each other and in a predetermined first direction and a wiring structure that includes source wirings 9, drain wirings 10, and gate wirings 11 disposed on the electrode structure and extending in parallel to each other and in a second direction orthogonal to the first direction. The source wirings 9, the drain wirings 10, and the gate wirings 11 are electrically connected to the source electrodes 3, the drain electrodes 5, and the gate electrode 4, respectively. The semiconductor device 1 includes a conductive film 8 disposed between the gate electrode 4 and the drain wirings 10 and being electrically connected to the source electrodes 3.

A semiconductor device includes a nitride-based transistor, a first metal layer, a second metal layer, a third metal layer, a source pad, and a drain pad. The first metal layer is disposed over the nitride-based transistor. The second metal layer is disposed over the first metal layer. The third metal layer is disposed over the second metal layer and includes a first pattern and a second pattern which are spaced apart from each other. The source pad is immediately above the first metal layer, the second metal layer, and the first pattern of the third metal layer and is electrically coupled with the nitride-based transistor. The drain pad is immediately above the first metal layer, the second metal layer, and the second pattern of the third metal layer and is electrically coupled with the nitride-based transistor.

The present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2DEG) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of Al, Ga, O, and N; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.

A package structure is provided. The package structure includes a leadframe, a GaN power device, and an electrostatic discharge protection component. The leadframe includes a gate pad, a source pad, and a drain pad, which are disposed on the leadframe. The GaN power device has a gate end. The GaN power device is disposed on the source pad of the leadframe. The electrostatic discharge protection component includes a first pad. The first pad is disposed on the electrostatic discharge protection component. The electrostatic discharge protection component is disposed on the source pad of the leadframe. The gate end of the GaN power device is electrically connected to the first pad of the electrostatic discharge protection component. The first pad of the electrostatic discharge protection component is electrically connected to the gate pad of the leadframe.

An epitaxial structure includes a composite base unit and an emitter unit. The composite base unit includes a first base layer and a second base layer formed on the first base layer. The first base layer is made of a material of In.sub.xGa.sub.(1-x)As.sub.(1-y)N.sub.y, in which 0<x0.2, and 0y0.035, and when y is not 0, x=3y. The second base layer is made of a material In.sub.mGa.sub.(1-m)As, in which 0.03m0.2. The emitter unit is formed on the second base layer 12 opposite to the first base layer 11, and is made of an indium gallium phosphide-based material. A transistor including the epitaxial structure is also disclosed.