RC-network components that include a substrate having a capacitor with a thin-film top electrode portion at a surface at one side of the substrate. The low ohmic semiconductor substrate is doped to contribute 5% or less to the resistance of the RC-network component. The resistance in series with the capacitor is controlled by providing a contact plate, spaced from the top electrode portion by an insulating layer, and a set of one or more bridging contacts in openings in the insulating layer. The bridging contacts electrically interconnect the top electrode portion and contact plate. Different resistance values can be set by appropriate selection of the number of bridging contacts. Temperature concentration at the periphery of the openings is reduced by providing reduced thickness portions in the insulating layer around the periphery of the openings.

An amplifier circuit that includes an RF amplifier; an impedance matching network; a higher order harmonic termination circuit; a fundamental frequency matching circuit; and an integrated passive device (IPD) that includes a silicon carbide (SiC) substrate. The integrated passive device (IPD) includes one or more reactive components of the fundamental frequency matching circuit and one or more reactive components of the higher order harmonic termination circuit.

An amplifier circuit that includes an RF amplifier; an impedance matching network; a higher order harmonic termination circuit; a fundamental frequency matching circuit; and an integrated passive device (IPD) that includes a silicon carbide (SiC) substrate. The integrated passive device (IPD) includes one or more reactive components of the fundamental frequency matching circuit and one or more reactive components of the higher order harmonic termination circuit.

To provide a thin film capacitor having high adhesion performance with respect to a circuit substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The first and second electrode layers are formed in an area surrounded by an outer peripheral area of the upper surface of the metal foil so as not to cover the outer peripheral area. The outer peripheral area of the roughened upper surface of the metal foil is thus exposed, so that adhesion performance with respect to a circuit substrate can be enhanced.

A detonator for an explosive material is described. The detonator includes a semiconductor bridge, coupled with the explosive material, including thermal feedback mechanism is provided via one or more thermistors. An exemplary mechanism includes a semiconductor bridge with a polysilicon resistor and a pair of thermistors. The two thermistors are disposed to be substantially close to or sandwich the polysilicon resistor. When the temperature surrounding the polysilicon resistor is getting upwards, the temperature surrounding the thermistors is equally going up. When the temperature reaches a critical point, but below the threshold of the polysilicon resistor, the resistance of the thermistors drops suddenly or drastically, causing the current driving up the temperature of the polysilicon resistor to divert through the VOX temp resistors. Subsequently the current going through the polysilicon resistor is reduced, causing the temperature to drop downwards.

A method of manufacturing a semiconductor device includes forming a cell chip including a first substrate, a source layer on the first substrate, a stacked structure on the source layer, and a channel layer passing through the stacked structure and coupled to the source layer, flipping the cell chip, exposing a rear surface of the source layer by removing the first substrate from the cell chip, performing surface treatment on the rear surface of the source layer to reduce a resistance of the source layer, forming a peripheral circuit chip including a second substrate and a circuit on the second substrate, and bonding the cell chip including the source layer with a reduced resistance to the peripheral circuit chip.

A method of manufacturing a semiconductor device includes forming a cell chip including a first substrate, a source layer on the first substrate, a stacked structure on the source layer, and a channel layer passing through the stacked structure and coupled to the source layer, flipping the cell chip, exposing a rear surface of the source layer by removing the first substrate from the cell chip, performing surface treatment on the rear surface of the source layer to reduce a resistance of the source layer, forming a peripheral circuit chip including a second substrate and a circuit on the second substrate, and bonding the cell chip including the source layer with a reduced resistance to the peripheral circuit chip.

Techniques to utilize thin-oxide devices, such as gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs), in high voltage environments, such as to provide a high-voltage based low-power, temperature dependent, thin-oxide-only on-chip high current low drop out (LDO) regulator in a system-on-chip (SoC), such as provide power to configuration random-access memory (CRAM) cells distributed throughout configurable/programmable circuitry. Thin-oxide only circuitry may include thin-oxide-only amplifier circuitry, thin-oxide-only power gate circuitry, thin-oxide-only level shifters that shift voltage swings of control signals to voltage domains of the power gate circuitry, and thin-oxide-only clamp circuitry.

Techniques to utilize thin-oxide devices, such as gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs), in high voltage environments, such as to provide a high-voltage based low-power, temperature dependent, thin-oxide-only on-chip high current low drop out (LDO) regulator in a system-on-chip (SoC), such as provide power to configuration random-access memory (CRAM) cells distributed throughout configurable/programmable circuitry. Thin-oxide only circuitry may include thin-oxide-only amplifier circuitry, thin-oxide-only power gate circuitry, thin-oxide-only level shifters that shift voltage swings of control signals to voltage domains of the power gate circuitry, and thin-oxide-only clamp circuitry.

A device is described. The device includes a substrate having a first cavity. The device also includes a first redistribution layer (RDL) on sidewalls and a base of the first cavity in the substrate and on a first surface of the substrate. The device further includes a fill material in the first cavity.