An integrated circuit device, such as a system-on-a-chip (SOC) device that includes an integrated or embedded voltage regulator, comprises an integrated capacitor and an integrated inductor having a magnetic core that can be fabricated in the same process as the capacitive structure of the integrated capacitor.

A semiconductor device (1) includes a first metal wiring layer (11) formed on a substrate (10), an interlayer insulating film (12) formed on the first metal wiring layer (11), a second metal wiring layer (23) formed on the interlayer insulating film (12), a first resistor including a first resistance metal film (14a) formed between the first metal wiring layer (11) and the second metal wiring layer (23), a first insulating film (15a) formed on the first resistance metal film (14a), and a second resistance metal film (16a) formed on the first insulating film (15a), and a second resistor including a first resistance metal film (14b) formed between the first metal wiring layer (11) and the second metal wiring layer (23), a first insulating film (15b) formed on the first resistance metal film (14b), and a second resistance metal film (16b) formed on the first insulating film (15b).

A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM capacitor (114) having a top capacitor electrode (118) and a bottom capacitor electrode (112) at a smaller distance from the substrate than the top capacitor electrode; fabricating an electrically insulating first cover layer (120) on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material; thinning the first cover layer; fabricating an electrically insulating second cover layer (124) on the first cover layer, which second cover layer partly or fully covers the first cover layer and has a dielectric permittivity smaller than that of the first cover layer; and fabricating an electrically conductive resistor layer (126) on the second cover layer, which resistor layer has a defined ohmic resistance.

A method comprising: forming a polyimide layer; forming a thin film resistor on the polyimide layer; forming, on the thin film resistor and the polyimide layer, a metallization layer that includes metal contacts on opposing ends of the thin film resistor but leaves an exposed surface of the polyimide layer; baking the polyimide layer, the thin film resistor, and the metallization layer to remove water from the polyimide layer; forming, on the exposed surface of the polyimide layer, a hydrophobic moisture barrier layer that prevents absorption of water into the polyimide layer to avoid blistering of the thin film resistor during subsequent laser trimming of the thin film resistor; and laser trimming a resistance of the thin film resistor between the metal contacts.

A semiconductor device includes a capacitor and a resistor. The capacitor includes a first plate, a capacitor dielectric layer disposed over the first plate, and a second plate disposed over the capacitor dielectric layer. The resistor includes a thin film. The thin film of the resistor and the first plate of the capacitor, formed of a same conductive material, are defined in a single patterning process.

A filter, a method for manufacturing a filter and an electronic apparatus are provided, and belongs to the field of passive device technology. The filter includes a dielectric substrate, and at least one inductor and at least one capacitor integrated thereon. The dielectric substrate includes first connection vias penetrating through the dielectric substrate in a thickness direction thereof, and opposite first and second surfaces in the thickness direction. Each inductor includes first and second conductive structures respectively on the first and second surfaces, and first connection electrodes in the first connection vias. The first conductive structures and the second conductive structures form a coil structure of the inductor by the first connection electrodes. A buffer layer is provided between the first conductive structures and the first surface. Each first conductive structure is electrically connected to the first connection electrode by a second connection via penetrating through the buffer layer.

Passive components located outside the IC increase the area of the package and are connected to the circuits inside the IC by long electrical paths that may have high resistance as well as parasitic inductance and capacitance. An IC includes interconnect layers on a surface of a substrate comprising circuits, and the interconnect layers include stacked thin-film inductors formed in interconnect layers to provide noise protection for input signals provided to circuits in the IC while reducing an area of an IC package. The stacked thin-film inductors include a first thin-film inductor stacked between a second thin-film inductor and the surface of the substrate in a direction orthogonal to the surface of the substrate. The thin-film inductors can be formed of layers of magnetic material around a linear interconnect. The interconnect layers may be formed in a back end of line process on one surface of a substrate.

A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.

RC-network components that include a substrate and capacitor having a thin-film top electrode portion at a surface on one side of the substrate. The low ohmic semiconductor substrate is doped to contribute 5% or less to the resistance of the RC-network component. The resistance provided in series with the capacitor is controlled by providing a contact plate, spaced from the thin-film top electrode portion by an insulating layer, and a set of one or more bridging contacts passing through openings in the insulating layer. The bridging contacts electrically interconnect the thin-film top electrode portion and the contact plate. Different resistance values can be set by appropriate selection of the number of bridging contacts. The openings are elongated thereby reducing temperature concentration at their periphery. Correspondingly, the bridging contacts have an elongated cross-sectional shape.