H10D86/0214

Interconnect Structures For Assembly Of Semiconductor Structures Including At Least One Integrated Circuit Structure

A semiconductor structure includes at least two substrate layers, each of the at least two substrate layers having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes a substrate joining layer disposed between and coupled to the second surface of a first one of the at least two substrate layers and the first surface of a second one of the at least two substrate layers. The substrate joining layer includes at least one integrated circuit (IC) structure disposed between the first and second surfaces of said substrate joining layer. A corres ponding method for fabricating a semiconductor structure is also provided.

PEELING APPARATUS AND MANUFACTURING APPARATUS OF SEMICONDUCTOR DEVICE

To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.

Stacked FET With Local Contact

A semiconductor device includes a first source/drain region, a first contact over the first source/drain region, a second source/drain region, and a lateral contact connecting the second source/drain region to a back end of line (BEOL). Portions of the first contact are recessed, and the lateral contact overlaps with the recessed portions of the first contact. The first source/drain region is formed over the second source/drain region.

INTEGRATION OF STACKED LOGIC DEVICE WITH PASSIVE DEVICE
20250063817 · 2025-02-20 ·

Embodiments of present invention provide a semiconductor structure. The structure includes an active device region and a passive device region, the active device region and the passive device region being separated by a single diffusion break, where the passive device region includes a first passive device. The first passive device includes a first diffusion region and a second diffusion region, the first and the second diffusion region being vertically connected by a lightly doped region, where the first diffusion region is connected to a backside power distribution network through a first direct backside contact (BSCA) and the second diffusion region is connected to a back-end-of-line (BEOL) structure through a first middle-of-line contact. A method of forming the same is also provided.

DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME

A display device includes a display layer comprising pixels, each of the pixels having at least one thin-film transistor, a connection line electrically connected to the at least one thin-film transistor, the connection line being exposed on a lower surface of the display layer through a first contact hole formed in the display layer, a barrier layer disposed on the lower surface of the display layer and including a second contact hole connected to the first contact hole, a lead line disposed on a lower surface of the barrier layer and electrically connected to the connection line through the second contact hole, a pad part disposed on the lower surface of the barrier layer and electrically connected to the lead line, and a lower film overlapping the lower surface of the barrier layer and the lead line.

Display substrate and method for manufacturing the same, and display device

A display substrate includes a first display region and a second display region. The display substrate may include: a first base substrate; a second base substrate; a first barrier layer and a light emitting unit. The first base substrate includes a first through region penetrating the first base substrate, and the first barrier layer includes a second through region penetrating the first barrier layer. The second base substrate includes a first substrate sub-portion located in the first display region, the first substrate sub-portion penetrates the second through region, and at least a portion of the first substrate sub-portion is located in the first through region. The display substrate includes a recessed portion. The second base substrate includes a first surface located in the first display region and a second surface located in the second display region, and the first surface and the second surface are formed as a flat surface.

Method of manufacturing display device

To provide a method of manufacturing a display device having an excellent impact resistance property with high yield, in particular, a method of manufacturing a display device having an optical film that is formed using a plastic substrate. The method of manufacturing a display device includes the steps of: laminating a metal film, an oxide film, and an optical filter on a first substrate; separating the optical filter from the first substrate; attaching the optical filter to a second substrate; forming a layer including a pixel on a third substrate; and attaching the layer including the pixel to the optical filter.

Display device having a multilayered undercoating layer of silicon oxide and silicon nitride

According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.

CARRIER SUBSTRATE HAVING A PLURALITY OF FLUID PASSAGES AND METHOD OF FABRICATING DISPLAY APPARATUS UTILIZING THE SAME

The present application discloses a method of fabricating a display apparatus, comprising providing a carrier substrate comprising a base substrate and an adhesive layer over the base substrate, wherein the base substrate comprises a plurality of fluid passages between the base substrate and the adhesive layer, and a plurality of fluid inlets connected with the plurality of fluid passages; forming a product substrate on a side of the adhesive layer distal to the base substrate; dispensing a detaching agent through the plurality of fluid inlets to the plurality of fluid passages, and contacting the detaching agent with the adhesive layer through the plurality of fluid passages; and detaching the product substrate from the carrier substrate.

THIN FILM TRANSISTOR AND ORGANIC EL DISPLAY DEVICE
20170141231 · 2017-05-18 · ·

A thin film transistor includes: a substrate; an undercoat layer disposed on the substrate; an oxide semiconductor layer formed above the undercoat layer and including at least indium; a gate insulating layer located opposite the undercoat layer with the oxide semiconductor layer being between the gate insulating layer and the undercoat layer; a gate electrode located opposite the oxide semiconductor layer with the gate insulating layer being between the gate electrode and the oxide semiconductor layer; and a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, wherein fluorine is included in a region which is an internal region in the oxide semiconductor layer and is close to the undercoat layer.