Patent classifications
H10H20/811
Semiconductor Component with a Multi-Layered Nucleation Body
There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.
Optoelectronic component and method for the production thereof
The invention concerns an optoelectronic component comprising a layer structure with a light-active layer. In a first lateral region the light-active layer has a higher density of V-defects than in a second lateral region.
PROTECTIVE CAPPING LAYER FOR SPALLED GALLIUM NITRIDE
Described herein is a method for manufacturing a stack of semiconductor materials in which a growth substrate is separated from the stack after a semiconductor material, e.g., a Group III nitride semiconductor material, is grown on the substrate. The separation is effected in a spalling procedure in which spalling-facilitating layers are deposited over a protective cap layer that is formed over the Group III-nitride semiconductor material. Such spalling-facilitating layers may include a handle layer, a stressor layer, and an optional adhesion layer. The protective cap layer protects the Group III-nitride from being damaged by the depositing of one or more of the spalling-facilitating layers. After spalling to remove the growth substrate, additional processing steps are taken to provide a semiconductor device that includes undamaged semiconductor material. In one arrangement, the semiconductor material is GaN and includes p-doped GaN region that was undamaged during manufacturing.
Semiconductor light emitting device
A semiconductor light emitting device includes first and second light emitting bodies, a first electrode, a second electrode and a first interconnection. The first and second light emitting bodies are disposed on a conductive substrate, and each includes first and second semiconductor layers and a light emitting layer therebetween. The first electrode is provided between the first light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer and the conductive substrate. The second electrode is provided between the second light emitting body and the conductive substrate, and electrically connected to a first semiconductor layer. The first interconnection electrically connects the second semiconductor layer of the first light emitting body and the second electrode. The first interconnection includes a first portion extending over the first and second light emitting bodies and a second portion extending into the second light emitting body.
LIGHT-EMITTING DEVICE AND LIGHTING SYSTEM
One embodiment relates to a light-emitting device, a method for manufacturing the light-emitting device, a light-emitting device package, and a lighting system. The light-emitting device, according to the one embodiment, can comprise: a first conductive semiconductor layer; an active layer on the first conductive semiconductive layer; a gallium nitride based superlattice layer on the active layer; and a second conductive semiconductor layer on the gallium nitride based superlattice layer. The gallium nitride based superlattice layer can comprise: a first gallium nitride based superlattice layer on the active layer; and a second gallium nitride based superlattice layer on the first gallium nitride based superlattice layer.
SEMICONDUCTING PIXEL, MATRIX OF SUCH PIXELS, SEMICONDUCTING STRUCTURE FOR THE PRODUCTION OF SUCH PIXELS AND THEIR METHODS OF FABRICATION
A pixel comprises three adjacent sub-pixels, formed by respective stacks of semi-conducting layers wherein: each sub-pixel comprises a first active layer, adapted for emitting a light at a first wavelength when an electric current passes through it; another sub-pixel comprises a second active layer, adapted for emitting a light at a second wavelength greater than the first wavelength; another sub-pixel comprises a third active layer, adapted for emitting a light at a third wavelength greater than the first wavelength and different from the second wavelength; at least one from among the second and third active layers being adapted for emitting light when it is excited by the light at the first wavelength emitted by the first active layer of the same sub-pixel. Semi-conducting structure and methods for the fabrication of such a pixel are provided.
VERTICAL GATE-ALL-AROUND TFET
A vertical tunneling FET (TFET) provides low-power, high-speed switching performance for transistors having critical dimensions below 7 nm. The vertical TFET uses a gate-all-around (GAA) device architecture having a cylindrical structure that extends above the surface of a doped well formed in a silicon substrate. The cylindrical structure includes a lower drain region, a channel, and an upper source region, which are grown epitaxially from the doped well. The channel is made of intrinsic silicon, while the source and drain regions are doped in-situ. An annular gate surrounds the channel, capacitively controlling current flow through the channel from all sides. The source is electrically accessible via a front side contact, while the drain is accessed via a backside contact that provides low contact resistance and also serves as a heat sink. Reliability of vertical TFET integrated circuits is enhanced by coupling the vertical TFETs to electrostatic discharge (ESD) diodes.
HIGH-EFFICIENCY LIGHT EMITTING DIODE
A light emitting diode (LED) includes a semiconductor material with an active region. The active region is disposed in the semiconductor material to produce light in response to a voltage applied across the semiconductor material. The active region includes a wide bandgap region disposed to inhibit charge transfer from a central region of the LED to the lateral edges of the LED. The active region also includes a narrow bandgap region disposed in the central region with the wide bandgap region disposed about the narrow bandgap region, and the narrow bandgap region has a narrower bandgap than the wide bandgap region.
GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE
The present invention provides a Group III nitride semiconductor light-emitting device in which electrons and holes are suppressed from being captured by threading dislocation, and a production method therefor. The light-emitting device comprises an n-type contact layer, an n-side electrostatic breakdown preventing layer, an n-side superlattice layer, a light-emitting layer, a p-type cladding layer, a p-type contact layer, a transparent electrode, an n-electrode, and a p-electrode. The light-emitting device has a plurality of pits extending from the n-type semiconductor layer to the p-type semiconductor layer. The n-side electrostatic breakdown preventing layer has an n-type AlGaN layer. The n-type AlGaN layer includes starting points of the pits.
Light emitting diode and method of fabricating the same
Exemplary embodiments of the present invention disclose a light emitting diode including an n-type contact layer doped with silicon, a p-type contact layer, an active region disposed between the n-type contact layer and the p-type contact layer, a superlattice layer disposed between the n-type contact layer and the active region, the superlattice layer including a plurality of layers, an undoped intermediate layer disposed between the superlattice layer and the n-type contact layer, and an electron reinforcing layer disposed between the undoped intermediate layer and the superlattice layer. Only a final layer of the super lattice layer closest to the active region is doped with silicon, and the silicon doping concentration of the final layer is higher than that of the n-type contact layer.