Diode includes light emitting region, first metal layer, dielectric layer, and second metal layer. Light emitting diode includes n-type group III-nitride portion, p-type group III-nitride layer, and light emitting region sandwiched between n- and p-type layers. First metal layer may be coupled to p-type III-N portion and plurality of first terminals. First metal layer and p-type III-N portion may have substantially similar lateral size that is smaller than 200 micrometers. A portion of light emitting region and first metal layer may include a single via. Electrically-insulating layer may be coupled to first metal layer and sides of the single via. First terminals may be exposed from electrically-insulating layer. Second metal layer may include second terminal and may be coupled to electrically-insulating layer and to n-type III-N portion through the single via. The thickness of the diode excluding second terminal may be between 2 and 20 micrometers. Other embodiments are described.

A light-emitting diode structure comprises a first semiconductor layer; a second semiconductor layer under the first semiconductor layer; a light-emitting layer between the first semiconductor layer and the second semiconductor layer for emitting a light; a first electrical pad on the first semiconductor layer for wire bonding; a first extension connecting to the first electrical pad; and a first reflective layer covering the first extension and exposing the first electrical pad, wherein the first electrical pad and the first extension have the same thickness, and the reflectivity of the first reflective layer is higher than that of the first extension.

A multiple quantum well structure includes a plurality of well-barrier sets arranged along a direction. Each of the well-barrier sets includes a barrier layer, at least one intermediate level layer, and a well layer. A bandgap of the barrier layer is greater than an average bandgap of the intermediate level layer, and the average bandgap of the intermediate level layer is greater than a bandgap of the well layer. The barrier layers, the intermediate level layers, and the well layers of the well-barrier sets are stacked by turns. Thicknesses of at least parts of the well layers in the direction gradually decrease along the direction, and thicknesses of at least parts of the intermediate level layers in the direction gradually increase along the direction. A method for manufacturing a multiple quantum well structure is also provided.

An optoelectronic semiconductor component includes a layer stack based on a nitride compound semiconductor and has an n-type semiconductor region , a p-type semiconductor region and an active layer arranged between the n-type semiconductor region and the p-type semiconductor region. In order to form an electron barrier, the p-type semiconductor region includes a layer sequence having a plurality of p-doped layers composed of Al.sub.xIn.sub.yGa.sub.1xyN where 0<=x<=1, 0<=y<=1 and x+y<=1. The layer sequence includes a first p-doped layer having an aluminum proportion x1>=0.5 and a thickness of not more than 3 nm, and the first p-doped layer, at a side facing away from the active layer, is succeeded by at least a second p-doped layer having an aluminum proportion x2<x1 and a third p-doped layer having an aluminum proportion x3<x2.

A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).

Semiconductor structures include an active region between a plurality of layers of InGaN. The active region may be at least substantially comprised by InGaN. The plurality of layers of InGaN include at least one well layer comprising In.sub.wGa.sub.1-wN, and at least one barrier layer comprising In.sub.bGa.sub.1-bN proximate the at least one well layer. In some embodiments, the value of w in the In.sub.wGa.sub.1-wN of the well layer may be greater than or equal to about 0.10 and less than or equal to about 0.40 in some embodiments, and the value of b in the In.sub.bGa.sub.1-bN of the at least one barrier layer may be greater than or equal to about 0.01 and less than or equal to about 0.10. Methods of forming semiconductor structures include growing such layers of InGaN to form an active region of a light emitting device, such as an LED. Luminary devices include such LEDs.

A non-polar blue light LED epitaxial wafer based on an LAO substrate comprises the LAO substrate, and a buffer layer, a first non-doped layer, a first doped layer, a quantum well layer, an electron barrier layer and a second doped layer that are sequentially arranged on the LAO substrate. A preparation method of the non-polar blue light LED epitaxial wafer includes: a) adopting the LAO substrate, selecting a crystal orientation, and cleaning a surface of the LAO substrate; b) annealing the LAO substrate, and forming an AlN seed crystal layer on the surface of the LAO substrate; and c) sequentially forming a non-polar m face GaN buffer layer, a non-polar non-doped u-GaN layer, a non-polar n-type doped GaN film, a non-polar InGaN/GaN quantum well, a non-polar m face AlGaN electron barrier layer and a non-polar p-type doped GaN film on the LAO substrate by adopting metal organic chemical vapor deposition.

The invention provides a luminescent nano particles based luminescent material comprising a matrix of interconnected coated luminescent nano particles, wherein for instance wherein the luminescent nano particles comprise CdSe, wherein the luminescent nano particles comprise a coating of CdS and wherein the matrix comprises a coating comprising ZnS. The luminescent material according may have a quantum efficiency of at least 80% at 25 C., and having a quench of quantum efficiency of at maximum 20% at 100 C. compared to the quantum efficiency at 25 C.

A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer.

A display apparatus includes a display panel and a backlight unit which provides light to the display panel. The backlight unit includes a light guide part, a light source part facing a light incident surface of the light guide part and including a circuit board, a first light emitting device package disposed on the circuit board, and a second light emitting device package disposed on the circuit board and which generates light having a wavelength different from that of light generated by the first light emitting device package, and an optical member disposed on at least one light emitting device package of the first and second light emitting device packages and including a plurality of rod-type lenses.