Patent classifications
H10H20/811
Method to control the relaxation of thick films on lattice-mismatched substrates
A substrate comprising a III-N base layer comprising a first portion and a second portion, the first portion of the III-N base layer having a first natural lattice constant and a first dislocation density; and a first III-N layer having a second natural lattice constant and a second dislocation density on the III-N base layer, the first III-N layer having a thickness greater than 10 nm. An indium fractional composition of the first III-N layer is greater than 0.1; the second natural lattice constant is at least 1% greater than the first natural lattice constant; a strain-induced lattice constant of the first III-N layer is greater than 1.0055 times the first natural lattice constant; and the second dislocation density is less than 1.5 times the first dislocation density.
Method to control the relaxation of thick films on lattice-mismatched substrates
A substrate comprising a III-N base layer comprising a first portion and a second portion, the first portion of the III-N base layer having a first natural lattice constant and a first dislocation density; and a first III-N layer having a second natural lattice constant and a second dislocation density on the III-N base layer, the first III-N layer having a thickness greater than 10 nm. An indium fractional composition of the first III-N layer is greater than 0.1; the second natural lattice constant is at least 1% greater than the first natural lattice constant; a strain-induced lattice constant of the first III-N layer is greater than 1.0055 times the first natural lattice constant; and the second dislocation density is less than 1.5 times the first dislocation density.
Light emitting diode device containing a positive photoresist insulating spacer and a conductive sidewall contact and method of making the same
A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
LIGHT EMITTING ELEMENT AND DISPLAY DEVICE USING LIGHT EMITTING ELEMENT
A light emitting element is provided. The light emitting element includes: a light emitting stack including an active layer between an N-type nitride semiconductor layer and a P-type nitride semiconductor layer, the light emitting stack having a width of 5 nm or more and 200 m or less; a first electrode connected to the N-type nitride semiconductor layer; and a second electrode connected to the P-type nitride semiconductor layer. The P-type nitride semiconductor layer has a first surface, adjacent to the active layer, and a second surface, opposite to the first surface, and includes Al.sub.xIn.sub.yGa.sub.zN (0x<1, 0y<1, 0<z1), and a bandgap of the p-type nitride semiconductor layer does not increase in a stacking direction from the second surface to the first surface. The N-type nitride semiconductor layer includes a superlattice layer and an electron retardation layer.
SEMICONDUCTOR DEVICE
A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an insulating layer, and a conductive layer. The active region has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The insulating layer covers a portion of the first semiconductor layer. The conductive layer covers the insulating layer and physically contacts the first semiconductor layer. The second semiconductor layer includes a first dopant and the first semiconductor layer includes a second dopant different from the first dopant. The first semiconductor layer includes a quaternary III-V semiconductor material, and the active region includes a quaternary semiconductor material, and the semiconductor device emits a radiation having a peak wavelength between 800 nm and 2000 nm.
SEMICONDUCTOR DEVICE
A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an insulating layer, and a conductive layer. The active region has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The insulating layer covers a portion of the first semiconductor layer. The conductive layer covers the insulating layer and physically contacts the first semiconductor layer. The second semiconductor layer includes a first dopant and the first semiconductor layer includes a second dopant different from the first dopant. The first semiconductor layer includes a quaternary III-V semiconductor material, and the active region includes a quaternary semiconductor material, and the semiconductor device emits a radiation having a peak wavelength between 800 nm and 2000 nm.
MICRO LIGHT-EMITTING DEVICE
A micro light-emitting device includes a semiconductor epitaxial structure having a bottom surface and a top surface opposite to each other, and including a first cladding layer, an active layer, and a second cladding layer disposed sequentially in such order in a direction from the bottom surface to the top surface. At least one of the first and second cladding layers has a super-lattice structure. The super-lattice structure of the first cladding layer includes first sublayers and second sublayers stacked alternately. Each first sublayer includes Al.sub.x1Ga.sub.1-x1InP, and each second sublayer includes Al.sub.x2Ga.sub.1-x2InP, where 0<x1<x21. The super-lattice structure of the second cladding layer including third sublayers and fourth sublayers stacked alternately. Each third sublayer includes Al.sub.z1Ga.sub.1-z1InP, and each fourth sublayer includes Al.sub.z2Ga.sub.1-z2InP, where 0<z1<z21.
Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
A method of forming a semiconductor structure includes forming an opening in a dielectric layer, forming a recess in an exposed part of a substrate, and forming a lattice-mismatched crystalline semiconductor material in the recess and opening.
Light-emitting device
The present disclosure provides a light-emitting device. The light-emitting device comprises a substrate; a light-emitting stack which emits infrared (IR) light on the substrate; and a semiconductor window layer comprising AlGaInP series material disposed between the substrate and the light-emitting stack.
Small-sized light-emitting diode chiplets and method of fabrication thereof
Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.