Patent classifications
H10H20/812
GROWTH METHOD AND STRUCTURE OF LED EPITAXY
The present disclosure provides a growth method and structure of LED epitaxy. The growth method of LED epitaxy comprises: providing a layer of substrate, wherein the substrate is an Al.sub.2O.sub.3 substrate or an Al.sub.2O.sub.3/SiO.sub.2 composite substrate; successively depositing and growing a SiC buffer layer and a u-GaN layer on the substrate; wherein the temperature used for depositing the SiC buffer layer is 6501550 degrees; the gas used for depositing the SiC buffer layer is a silicon source gas and a carbon source gas, a flow rate of the silicon source gas is 11000 sccm, and a flow rate of the carbon source gas is 11000 sccm; a gas carrier gas used for depositing the SiC buffer layer has a flow rate of 10500 slm; the SiC buffer layer is deposited at a pressure of 100700 torr; the SiC buffer layer is deposited for a thickness of 101000 A.
NEAR INFRARED PHOSPHOR AND LIGHT EMITTING DEVICE
A light emitting device includes a light emitting diode chip configured to emit first light having a peak wavelength of 400 nm to 470 nm; a wavelength conversion material converting a portion of the first light into second light having a peak wavelength of 620 nm to 670 nm; and a near-infrared phosphor configured to convert a portion of the first light into third light having a peak wavelength of 740 nm to 820 nm, wherein the near-infrared phosphor includes a phosphor represented by composition formula CaAl.sub.(12-x-y)Ga.sub.yO.sub.19:xCr.sup.3+, where x satisfies 0.1x0.3 and y satisfies 1 or more, and an emission spectrum of the third light alone has a ratio of an intensity of 690 nm relative to an intensity of 780 nm of 0.3 or less.
PATTERNING PHOSPHOR LAYERS USING POLYMER MASKS
A method for depositing patterned phosphor films comprises using a patterned polymer film as a mask to block phosphor deposition, or allow subsequent removal of deposited phosphor, from selected areas of a device surface covered by the polymer film. The method generally comprises disposing the patterned polymer film mask on the device, subsequently depositing the phosphor, and then removing the mask and any phosphor deposited on the mask from the device. The polymer film may be deposited in the desired mask pattern or patterned after deposition.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURE
Disclosed are a semiconductor structure and a manufacturing method for the semiconductor structure. The semiconductor structure includes a light-emitting structure; a light control layer disposed on a side of the light-emitting structure, including a plurality of light control regions regularly arranged and a substrate structure located between the plurality of light control regions; where the plurality of light control regions include a wavelength conversion structure, and the wavelength conversion structure includes a quantum dot and a porous structure adsorbed with the quantum dot. In the present disclosure, the plurality of light control regions and the substrate structure are provided to ensure uniform light output, good directionality, high light extraction rate, and avoidance of light crosstalk in each light control region. The porous structure is utilized to adsorb the quantum dot and achieve a full color display, thereby improving resolution, simplifying a manufacturing process and reducing costs.
LIGHT EMITTING DEVICE
The presented devices and methods are directed to efficient and effective photon emission. In one embodiment, high-performance tunnel junction deep ultraviolet (UV) light-emitting diodes (LEDs) are created using plasma-assisted molecular beam epitaxy. The device heterostructure was grown under slightly Ga-rich conditions to promote the formation of nanoscale clusters in the active region. The nanoscale clusters can act as charge containment configurations. In one exemplary implementation, a device operates at approximately 255 nm light emission with a maximum external quantum efficiency (EPE) of 7.2% and wall-plug efficiency (WPE) of 4%, which are nearly one to two orders of magnitude higher than previously reported tunnel junction devices operating at this wavelength. The devices exhibit highly stable emission originating from highly localized carriers in Ga-rich regions formed in the active region, with nearly constant emission peak with increasing current density up to 200 A/cm.sup.2, due to the strong charge carrier confinement related to the presence of nanoclusters (e.g., Ga-rich) and radiative emission originating from highly localized carriers in Ga-rich regions formed in the active region
MONOLITHIC ARRAY CHIP
A monolithic array chip comprises a first semiconductor layer; a common electrode located on the first semiconductor layer; a first light-emitting unit with a first electrode located on the first semiconductor layer; a second light-emitting unit with a second electrode located on the first semiconductor layer; a third light-emitting unit with a third electrode located on the first semiconductor layer, wherein the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are separated from each other by a trench.
RGB MICRO-LIGHT-EMITTING DIODE HAVING VERTICALLY-STACKED STRUCTURE WITH CORNER MESA CONTACT STRUCTURES AND MANUFACTURING METHOD THEREOF
The present inventive concept relates to an RGB micro-light-emitting diode having a vertically-stacked structure with corner mesa contact structures, and a manufacturing method thereof. The RGB micro-light-emitting diode having a vertically-stacked structure with corner mesa contact structures includes an n-type contact electrode layer, a first light-emitting structure, a common electrode layer, a second light-emitting structure, a tunnel junction layer, and a third light-emitting structure, which are sequentially stacked on a substrate. The RGB micro-light-emitting diode with a reduced unit area can be easily manufactured by forming the corner mesa contact structure on each of the n-type contact electrode layers by etching the vertically-stacked structure, forming contact structures on the n-type contact electrode layers, followed by electrical connection.
LEDs AND METHODS OF MANUFACTURE
In accordance with aspects of the present technology, a unique charge carrier transfer process from c-plane InGaN to semipolar-plane InGaN formed spontaneously in nanowire heterostructures can effectively reduce the instantaneous charge carrier density in the active region, thereby leading to significantly enhanced emission efficiency in the deep red wavelength. Furthermore, the total built-in electric field can be reduced to a few kV/cm by cancelling the piezoelectric polarization with spontaneous polarization in strain-relaxed high indium composition InGaN/GaN heterostructures. An ultra-stable red emission color can be achieved in InGaN over four orders of magnitude of excitation power range. Accordingly, aspects of the present technology advantageously provide a method for addressing some of the fundamental issues in light-emitting devices and advantageously enables the design of high efficiency and high stability optoelectronic devices.
Micro-LED structure and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. The micro-LED chip further includes: a top spacer formed on a top surface of the light emitting layer; a bottom spacer formed on a bottom surface of the light emitting layer; and an isolation structure formed between adjacent micro-LEDs.
Micro-LED structure and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. The micro-LED chip further includes: a top spacer formed on a top surface of the light emitting layer; a bottom spacer formed on a bottom surface of the light emitting layer; and an isolation structure formed between adjacent micro-LEDs.