A micro-LED structure includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extrudes along a horizontal level away from a top edge of the first type conductive layer and a bottom edge of the second type conductive layer, such that an edge of the light emitting layer does not contact the top edge of the first type conductive layer and the bottom edge of the second type conductive layer. A profile of the second type conductive layer perpendicularly projected on a top surface of the first type conductive layer is surrounded by the top edge of the first type conductive layer.

The present disclosure provides a light-emitting device. The light-emitting device comprises a substrate; a light-emitting stack which emits infrared (IR) light on the substrate; and a semiconductor window layer comprising AlGaInP series material disposed between the substrate and the light-emitting stack.

In one embodiment, the transparent growth substrate of an LED die is formed to have light scattering areas, such as voids formed by a laser. In another embodiment, the growth substrate is removed and replaced by another substrate that is formed with light scattering areas. In one embodiment, the light scattering areas are formed over the light absorbing areas of the LED die, to reduce the amount of incident light on those absorbing areas, and over the sides of the substrate to reduce light guiding. The replacement substrate may be formed to include reflective particles in selected areas. A 3D structure may be formed by stacking substrate layers containing the reflective areas. The substrate may be a transparent substrate or a phosphor tile that is affixed to the top of the LED.

An ultraviolet light emitting element includes a light emitting layer, a cap layer, an electron barrier layer. The light emitting layer has a multi-quantum well structure including barrier layers each including a first AlGaN layer and well layers each including a second AlGaN layer. The electron barrier layer includes at least one first p-type AlGaN layer and at least one second p-type AlGaN layer. The cap layer is located between the first p-type AlGaN layer and one of the well layers closest to the first p-type AlGaN layer. The cap layer is a third AlGaN layer having an Al composition ratio greater than an Al composition ratio of each of the well layers and less than an Al composition ratio of the first p-type AlGaN layer. The cap layer has a thickness of greater than or equal to 1 nm and less than or equal to 7 nm.

A light emitting diode (LED) device and packaging for same is disclosed. In some aspects, the LED is manufactured using a vertical configuration including a plurality of layers. Certain layers act to promote mechanical, electrical, thermal, or optical characteristics of the device. The device avoids design problems, including manufacturing complexities, costs and heat dissipation problems found in conventional LED devices. Some embodiments include a plurality of optically permissive layers, including an optically permissive cover substrate or wafer stacked over a semiconductor LED and positioned using one or more alignment markers.

High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm.sup.2.

An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a first semiconductor layer sequence having a plurality of microdiodes, and a second semiconductor layer sequence having an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

A light-emitting element includes a semiconductor light-emitting stack including a first semiconductor layer, an active layer, and a second semiconductor layer; a first conductive layer disposed on the second semiconductor layer and electrically connecting the second semiconductor layer; a second conductive layer disposed on the second semiconductor layer and electrically connecting the first semiconductor layer; and a cushion part disposed on the semiconductor light-emitting stack; wherein in a top view, the cushion part is disposed in a center region of the light-emitting element.

In one example, a device includes a trench formed in a substrate. The trench includes a first end and a second end that are non-collinear. A first plurality of semiconductor pillars is positioned near the first end of the trench and includes integrated light sources. A second plurality of semiconductor pillars is positioned near the second end of the trench and includes integrated photodetectors.

Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.