Patent classifications
H10H20/81
Method for forming a semiconducting portion by epitaxial growth on a strained portion
The invention pertains to formation of a semiconducting portion (60) by epitaxial growth on a strained germination portion (40), comprising the steps in which a cavity (21) is produced under a structured part (11) by rendering free a support layer (30) situated facing the structured part (11), a central portion (40), termed the strained germination portion, then being strained; and a semiconducting portion (60) is formed by epitaxial growth on the strained germination portion (40), wherein the structured part (11) is furthermore placed in contact with the support layer (30) in such a way as to bind the structured part (11) of the support layer.
Method for transferring semiconductor structure
A method for transferring a semiconductor structure is provided. The method includes: coating an adhesive layer onto a carrier substrate; disposing the semiconductor structure onto the adhesive layer, such that the adhesive layer temporarily adheres the semiconductor structure, in which the adhesive layer includes an adhesive component and a surfactant component therein after the disposing; irradiating the electromagnetic wave to the adhesive layer through the carrier substrate to reduce adhesion pressure of the adhesive layer to the semiconductor structure while remaining the semiconductor structure within a predictable position, in which the semiconductor structure has a rejection band or is completely opaque, the carrier substrate has a pass band, and the pass band of the carrier substrate and the rejection band of the semiconductor structure overlaps; and transferring the semiconductor structure from the adhesive layer to a receiving substrate structure after the adhesion pressure of the adhesive layer is reduced.
POWER LIGHT EMITTING DIODE AND METHOD WITH UNIFORM CURRENT DENSITY OPERATION
A light emitting diode device has a bulk gallium and nitrogen containing substrate with an active region. The device has a lateral dimension and a thick vertical dimension such that the geometric aspect ratio forms a volumetric diode that delivers a nearly uniform current density across the range of the lateral dimension.
MICRO-LED STRUCTURE AND MICRO-LED CHIP INCLUDING SAME
A micro-LED structure includes a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extends along a horizontal level away from a top edge of the first type conductive layer and a bottom edge of the second type conductive layer, such that an edge of the light emitting layer does not contact the top edge of the first type conductive layer and the bottom edge of the second type conductive layer. A profile of the first type conductive layer perpendicularly projected on a bottom surface of the second type conductive layer is surrounded by the bottom edge of the second type conductive layer.
LIGHT EMITTING DEVICE
A light emitting device including a substrate, a first conductivity-type semiconductor layer, a mesa including a second conductivity-type semiconductor layer and an active layer, first and second contact electrodes respectively contacting the first and second conductivity-type semiconductor layers, a passivation layer covering the first and second contact electrodes, the mesa, and including first and second openings, and first and second bump electrodes electrically connected to the first and second contact electrodes, respectively, in which the first and second bump electrodes are disposed on the mesa, the passivation layer is disposed between the first bump electrode and the second contact electrode, the first contact electrode includes a reflective material, and a portion of the first opening is surrounded with a side surface of the mesa, and another portion of the first opening is not surrounded with the side surface of the mesa.
SEMICONDUCTOR CHIP AND METHOD OF PRODUCING A PLURALITY OF SEMICONDUCTOR CHIPS
A semiconductor chip comprising a semiconductor layer sequence with an active region. The active region is configured to generate radiation. The semiconductor chip further includes a filter layer sequence wherein at least one first layer of the filter layer sequence comprises amorphous silicon. Further, a method of producing a plurality of semiconductor chips is disclosed.
High-voltage solid-state transducers and associated systems and methods
High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.
Nitride semiconductor
To provide a high-quality nitride semiconductor ensuring high emission efficiency of a light-emitting element fabricated. In the present invention, when obtaining a nitride semiconductor by sequentially stacking a one conductivity type nitride semiconductor part, a quantum well active layer structure part, and a another conductivity type nitride semiconductor part opposite the one conductivity type, the crystal is grown on a base having a nonpolar principal nitride surface, the one conductivity type nitride semiconductor part is formed by sequentially stacking a first nitride semiconductor layer and a second nitride semiconductor layer, and the second nitride semiconductor layer has a thickness of 400 nm to 20 m and has a nonpolar outermost surface. By virtue of selecting the above-described base for crystal growth, an electron and a hole, which are contributing to light emission, can be prevented from spatial separation based on the QCSE effect and efficient radiation is realized. Also, by setting the thickness of the second nitride semiconductor layer to an appropriate range, the nitride semiconductor surface can avoid having extremely severe unevenness.
Light emitting device with improved extraction efficiency
In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant a.sub.substrate. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant a.sub.layer and [(|a.sub.substratea.sub.layer|)/a.sub.substrate]*100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.
Light-emitting device and manufacturing method thereof
The present disclosure provides a method for manufacturing a light-emitting device, comprising: providing a first substrate; providing a semiconductor stack on the first substrate, the semiconductor stack comprising a first conductive type semiconductor layer, a light-emitting layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the light-emitting layer, wherein the semiconductor stack is patterned and comprises a plurality of blocks of semiconductor stack separated from each other, and wherein the plurality of blocks of semiconductor stack comprise a first block of semiconductor stack and a second block of semiconductor stack; performing a separating step to separate the first block of semiconductor stack from the first substrate, and the second block of semiconductor stack remained on the first substrate; providing a permanent substrate comprising a first surface, a second surface, and a third block of semiconductor stack on the first surface; and bonding one of the first block of semiconductor stack and the second block of semiconductor stack to the second surface.