Patent classifications
H10H20/81
EPITAXIAL STRUCTURE AND EPITAXIAL GROWTH METHOD FOR FORMING EPITAXIAL LAYER WITH CAVITIES
An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of slanting air voids tapering away from the substrate and an opening over each of the slanting air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the slanting air voids in a shape of trapezoid with the first epitaxial layer.
LIGHT EMITTING DEVICE
A light emitting device according to an embodiment comprises: a light emitting structure including a first conductive semiconductor layer, an active layer disposed under the first conductive semiconductor layer, and a second conductive semiconductor layer disposed under the active layer; a protective layer disposed above the light emitting structure and including a through region; a first electrode disposed in the through region and electrically connected to the first conductive semiconductor layer; an electrode pad electrically connected to the first electrode, and having a first region disposed on the first electrode and a second region disposed on the protective layer; and a second electrode electrically connected to the second conductive semiconductor layer.
Display apparatus using semiconductor light-emitting device
Discussed is a plurality of semiconductor light-emitting devices, wherein at least one of the semiconductor light-emitting devices includes: a first conductive electrode and a second conductive electrode; a first conductive semiconductor layer having the first conductive electrode arranged thereon; a second conductive semiconductor layer overlapping the first conductive semiconductor layer and having the second conductive electrode arranged thereon; an active layer arranged between the first conductive semiconductor layer and the second conductive semiconductor layer; an intermediate layer arranged on the second conductive semiconductor layer; a protrusion, made of an electro-polishable porous material, on the intermediate layer; and an undoped semiconductor layer arranged between the intermediate layer and the protrusion. The intermediate layer includes a first layer including second conductive impurities and a second layer having a higher concentration of the second conductive impurities than the first layer, wherein the first layer and the second layer are sequentially and repetitively stacked.
Micro-led structure and micro-led chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, and the multiple micro-LEDs sharing the light emitting layer. An isolation structure is formed between adjacent micro-LEDs, at least a portion of the isolation structure being formed in the light emitting layer. A bottom surface of the isolation structure is aligned with a bottom of the light emitting layer, and a top surface of the isolation structure is aligned with a top surface of the light emitting layer.
Micro-led structure and micro-led chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, and the multiple micro-LEDs sharing the light emitting layer. An isolation structure is formed between adjacent micro-LEDs, at least a portion of the isolation structure being formed in the light emitting layer. A bottom surface of the isolation structure is aligned with a bottom of the light emitting layer, and a top surface of the isolation structure is aligned with a top surface of the light emitting layer.
Micro-LED structure and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer.
Micro-LED structure and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer.
METAL OXIDE SEMICONDUCTOR-BASED LIGHT EMITTING DEVICE
The techniques described herein relate to a semiconductor structure including: a substrate, or a single crystal growth surface, including single crystal 4H-SiC(0001); a buffer layer on the single crystal growth surface; and an epitaxial oxide layer on the buffer layer. The buffer layer can include a crystal symmetry type that is compatible with the single crystal 4H-SiC(0001). The epitaxial oxide layer can include single crystal (Al.sub.xGa.sub.1-x).sub.2O.sub.3 with a monoclinic or corundum crystal symmetry, and where 0x1.
Polycrystalline ceramic substrate and method of manufacture
An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.
Micro-LED structure and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer, at least one part of the light emitting layer being formed between adjacent micro-LEDs. the micro-LED chip further comprises a metal layer formed on the light emitting layer between the adjacent micro-LEDs.