A method of making a semiconductor device includes forming a first fin in a first semiconducting material layer disposed over a substrate, the first semiconducting material layer comprising an element in a first concentration; and forming a second fin in a second semiconducting material layer disposed over the substrate and adjacent to the first semiconducting material layer, the second semiconducting material layer comprising the element in a second concentration; wherein the first concentration is different than the second concentration.

FinFET devices are formed on the same semiconductor structure wherein at least one finFET device has a gate dielectric structure that is different in thickness relative to a gate dielectric structure of at least one other finFET device. The finFET devices are formed as part of the same fabrication process.

Semiconductor device fabrication method and structures are provided having a substrate structure which includes a silicon layer at an upper portion. The silicon layer is recessed in a first region of the substrate structure and remains unrecessed in a second region of the substrate structure. A protective layer having a first germanium concentration is formed above the recessed silicon layer in the first region, which extends along a sidewall of the unrecessed silicon layer of the second region. A semiconductor layer having a second germanium concentration is disposed above the protective layer in the first region of the substrate structure, where the first germanium concentration of the protective layer inhibits lateral diffusion of the second germanium concentration from the semiconductor layer in the first region into the unrecessed silicon layer in the second region of the substrate structure.

Nanosheet semiconductor devices and methods of forming the same include forming a first stack in a first device region, the first stack including layers of a first channel material and layers of a sacrificial material. A second stack is formed in a second device region, the second stack including layers of a second channel material, layers of the sacrificial material, and a liner formed around the layers of the second channel material. The sacrificial material is etched away using a wet etch that is selective to the sacrificial material and the second channel material and does not affect the first channel material or the liner. The liner protects the second channel material from the wet etch.

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. An etch stop layer is deposited on the first insulator layer. A gate stack is formed over a channel region of the fin and over portions of the etch stop layer. A portion of the bulk semiconductor substrate is removed to expose portions of the etch stop layer and the fin, and a second insulator layer is deposited over exposed portions of the fin and the etch stop layer.

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. An etch stop layer is deposited on the first insulator layer. A gate stack is formed over a channel region of the fin and over portions of the etch stop layer. A portion of the bulk semiconductor substrate is removed to expose portions of the etch stop layer and the fin, and a second insulator layer is deposited over exposed portions of the fin and the etch stop layer.

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. An etch stop layer is deposited on the first insulator layer. A gate stack is formed over a channel region of the fin and over portions of the etch stop layer. A portion of the bulk semiconductor substrate is removed to expose portions of the etch stop layer and the fin, and a second insulator layer is deposited over exposed portions of the fin and the etch stop layer.

A method for forming a semiconductor device comprises forming a fin in a bulk semiconductor substrate and depositing a first insulator layer over portions of the bulk semiconductor substrate adjacent to the fin. The method further includes removing portions of the first insulator layer to reduce a thickness of the first insulator layer and expose a sidewall of the fin. An etch stop layer is deposited on the first insulator layer. A gate stack is formed over a channel region of the fin and over portions of the etch stop layer. A portion of the bulk semiconductor substrate is removed to expose portions of the etch stop layer and the fin, and a second insulator layer is deposited over exposed portions of the fin and the etch stop layer.

A method comprises forming a first set of one or more fins in a first region from an insulated substrate and a second set of one or more fins in a second region from the insulated substrate. The insulated substrate comprises a silicon substrate, and an insulator layer deposited on the silicon substrate. The first region comprises a first material layer and the second region comprises a second material layer.

A semiconductor device is provided that includes a first plurality of fin structures having a first width in a first region of a substrate, and a second plurality of fin structures having a second width in a second region of the substrate, the second width being less than the first width. A first gate structure is formed on the first plurality of fin structures including a first high-k gate dielectric that is in direct contact with a channel region of the first plurality of fin structures and a first gate conductor. A second gate structure is formed on the second plurality of fin structures including a high voltage gate dielectric that is in direct contact with a channel region of the second plurality of fin structures, a second high-k gate dielectric and a second gate conductor.