A MOSFET having a stacked-gate super-junction design and novel termination structure. At least some illustrative embodiments of the device include a conductive (highly-doped with dopants of a first conductivity type) substrate with a lightly-doped epitaxial layer. The volume of the epitaxial layer is substantially filled with a charge compensation structure having vertical trenches forming intermediate mesas. The mesas are moderately doped via the trench sidewalls to have a second conductivity type, while the mesa tops are heavily-doped to have the first conductivity type. Sidewall layers are provided in the vertical trenches, the sidewall layers being a moderately-doped semiconductor of the first conductivity type. The shoulders of the sidewall layers are recessed below the mesa top to receive an overlying gate for controlling a channel between the mesa top and the sidewall layer. The mesa tops are coupled to a source electrode, while a drain electrode is provided on the back side of the substrate.

A power semiconductor transistor includes a semiconductor body coupled to a load terminal, a drift region, a first trench extending into the semiconductor body and including a control electrode electrically insulated from the semiconductor body by an insulator, a source region arranged laterally adjacent to a sidewall of the first trench and electrically connected to the load terminal, a channel region arranged laterally adjacent to the same trench sidewall as the source region, a second trench extending into the semiconductor body, and a guidance zone electrically connected to the load terminal and extending deeper into the semiconductor body than the first trench. The guidance zone is adjacent the opposite sidewall of the first trench as the source region and adjacent one sidewall of the second trench. In a section arranged deeper than the bottom of the first trench, the guidance zone extends laterally towards the channel region.

Under one aspect, a power Schottky diode includes a cathode; a semiconductor disposed over the cathode, the semiconductor including at least a first region and a second region, the second region defining a guard ring; an anode disposed over the first region and at least a portion of the guard ring, the anode including a metal, a junction between the anode and the first region defining a Schottky barrier; and an oxide disposed over the guard ring. Additionally, the power Schottky diode can include a resistive material disposed over at least a portion of the guard ring and at least a portion of the oxide. The resistive material can inhibit a flow of holes from the guard ring to the anode following a heavy ion strike to the guard ring. The anode further can be disposed over at least a portion of, or the entirety of, the resistive material.

A semiconductor device includes a source metallization, a source region of a first conductivity type in contact with the source metallization, a body region of a second conductivity type which is adjacent to the source region. The semiconductor device further includes a first field-effect structure including a first insulated gate electrode and a second field-effect structure including a second insulated gate electrode which is electrically connected to the source metallization. The capacitance per unit area between the second insulated gate electrode and the body region is larger than the capacitance per unit area between the first insulated gate electrode and the body region.

A semiconductor power device may include a lightly doped layer formed on a heavily doped layer. One or more devices are formed in the lightly doped layer. Each device includes a body region, a source region, and one or more gate electrodes formed in corresponding trenches in the lightly doped region. Each trench has a first dimension (depth), a a second dimension (width) and a third dimension (length). The body region is of opposite conductivity type to the lightly and heavily doped layers. An opening is formed between first and second trenches through an upper portion of the source region and a body contact region to the body region. A deep implant region of the second conductivity type is formed in the lightly doped layer below the body region. The deep implant region is vertically aligned to the opening and spaced away from a bottom of the opening.

A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.

A method for fabricating a trench Schottky rectifier device is provided. At first, a plurality of trenched are formed in a substrate of a first conductivity type. An insulating layer is formed on sidewalls of the trenches. Then, an ion implantation procedure is performed through the trenches to form a plurality of doped regions of a second conductivity type under the trenches. Subsequently, the trenches are filled with conductive structure such as metal structure or tungsten structure. At last, an electrode overlying the conductive structure and the substrate is formed. Thus, a Schottky contact appears between the electrode and the substrate. Each doped region and the substrate will form a PN junction to pinch off current flowing toward the Schottky contact to suppress the current leakage in a reverse bias mode.

Higher voltage resistance is accomplished by expanding a depletion layer more quickly within a circumferential region. A semiconductor device includes an element region, in which an insulated gate type switching element is provided, and the circumferential region. A first trench and a second trench spaced apart from the first trench are provided in the front surface in the circumferential region. Insulating films are provided in the first trench and the second trench. A fourth region of the second conductivity type is provided so as to extend from a bottom surface of the first trench to a bottom surface of the second trench. A fifth region of the first conductivity type continuous from the third region is provided under the fourth region.

A semiconductor device provided herein includes: a fourth region of a p-type being in contact with a lower end of the gate trench; a termination trench provided in the front surface in a range outside the second region; a lower end p-type region of the p-type being in contact with a lower end of the termination trench; a lateral p-type region of the p-type being in contact with a lateral surface of the termination trench on an outer circumferential side, connected to the lower end p-type region, and exposed on the front surface; and a plurality of guard ring regions provided on the outer circumferential side with respect to the lateral p-type region and exposed on the front surface.

Various improvements in vertical transistors, such as IGBTs, are disclosed. The improvements include forming periodic highly-doped p-type emitter dots in the top surface region of a growth substrate, followed by growing the various transistor layers, followed by grounding down the bottom surface of the substrate, followed by a wet etch of the bottom surface to expose the heavily doped p+ layer. A metal contact is then formed over the p+ layer. In another improvement, edge termination structures utilize p-dopants implanted in trenches to create deep p-regions for shaping the electric field, and shallow p-regions between the trenches for rapidly removing holes after turn-off. In another improvement, a dual buffer layer using an n-layer and distributed n+ regions improves breakdown voltage and saturation voltage. In another improvement, p-zones of different concentrations in a termination structure are formed by varying pitches of trenches. In another improvement, beveled saw streets increase breakdown voltage.