A method for fabricating a display panel includes forming a first patterned conductive layer, a gate insulation layer, a semiconductor channel layer, a first passivation layer, a second patterned conductive layer and a pixel electrode on a first substrate. The first patterned conductive layer includes a gate electrode, and the second patterned conductive layer includes a source electrode, a drain electrode and a data line. The patterns of the gate insulation layer, the first passivation layer and the second patterned conductive layer are defined by an etching process and a lift-off process with the same photomask.

A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer.

The present application discloses a thin film transistor comprising active layer on a base substrate; an insulating layer over the active layer, the insulating layer comprising a source via and a drain via, each of which extending through the insulating layer; a source electrode within the source via in contact with the active layer; and a drain electrode within the drain via in contact with the active layer.

The manufacturing method of the thin film transistor includes the following steps. A gate, a first insulating layer, a second insulating layer, a metal oxide semiconductor layer, a first etching stop layer, a second etching stop layer and a photoresist structure are sequentially formed. The second etching stop layer, the first etching stop layer, and the metal oxide semiconductor layer are patterned using the photoresist structure as a mask to form a pre-second etching stop pattern, a pre-first etching stop pattern, and a metal oxide semiconductor pattern. The pre-second etching stop pattern and the pre-first etching stop pattern are patterned using the remaining thick portion of the photoresist structure as a mask to form a second etching stop pattern and a first etching stop pattern, and a portion of the second insulating layer is removed to form an insulating pattern. A source and a drain are formed.

Provided is a method for manufacturing an array substrate, in which a planarization layer mask includes a strip pattern that is provided for forming a groove and has two opposite sides along which taper modification patterns are provided so as to reduce taper of a groove formed in a planarization layer, making a slope thereof less steep, thereby preventing shorting of signal lines caused by residues of metal or ITO in a subsequent operation and thus increasing product yield. For the groove associated portion of an array substrate involving an in-cell touch structure, there is no need to change line for the touch sensing lines so as to lower down the difficulty of the operation and increase product yield.

A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The method comprises forming an active layer on a substrate, wherein source-and-drain-to-be-formed regions of the active layer are thicker than a semiconductor region between the source-and-drain-to-be-formed regions, and by a patterning process, forming a gate on the active layer, and forming a pattern of source and drain in the source-and-drain-to-be-formed regions of the active layer.

A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.

A method for manufacturing an array substrate comprises: forming a pixel electrode and a gate of a thin film transistor on a substrate; forming a gate insulating layer; forming an active layer and a source and a drain, which are provided on the active layer, of the thin film transistor by a patterning process; forming a passivation layer; forming a main via penetrating through the gate insulating layer and the passivation layer and a main-via extension portion under a portion of the drain by a patterning process, wherein the main via is connected to the main-via extension portion; removing a portion of the drain which protrudes above the main-via extension portion so as to form a final via; and forming a connection electrode and a common electrode, wherein the connection electrode electrically connects the drain to the pixel electrode through the final via.

Embodiments of the present invention discloses a touch-controlled panel and a method of manufacturing the same, and a display device, to reduce the number of masks and production cost. The method of manufacturing a touch-controlled panel includes: forming a first electrode and a second electrode on a substrate through a patterning process, the first electrode and the second electrode being broken at a position where they are overlapped; depositing a layer of an organic film and forming an organic film fully remained region, an organic film partially remained region and an organic film removed region from the organic film through a mask; depositing a conductive layer and coating a photoresist on the conductive layer, and then forming a photoresist fully remained region, a photoresist partially remained region and a photoresist removed region through the mask.

A pixel structure of a liquid crystal display panel includes a substrate, a switch device, a pixel electrode, an insulating layer, and a patterned common electrode. The switch device and the pixel electrode are disposed on the substrate, and the switch device is electrically connected to the pixel electrode. The insulating layer is disposed on the substrate and covers the switch device and the pixel electrode, wherein the insulating layer includes a plurality of trenches. The patterned common electrode is disposed on the insulating layer and does not cover the trenches. The pixel structure of the liquid crystal display panel and related manufacturing method are able to enhance the driving effect of the liquid crystal molecules, reduce the driving voltage and increase alignment performance of the alignment film.