H10D86/0231

Active matrix substrate, liquid crystal display device and method for manufacturing active matrix substrate

An active matrix substrate includes a substrate, a pixel TFT that is supported by the substrate, provided corresponding to each of a plurality of pixel areas, and includes an oxide semiconductor layer, an organic insulating layer disposed above at least the oxide semiconductor layer of the pixel TFT, and an inorganic insulating layer disposed in contact with an upper surface of the organic insulating layer on the organic insulating layer. The organic insulating layer and the inorganic insulating layer are provided with a plurality of dual-layer hole structure portions, each of the dual-layer hole structure portions includes a through-hole provided in the inorganic insulating layer and a bottomed hole provided in the organic insulating layer and positioned below the through-hole, and the through-hole is positioned on an inner side of an outer edge of the bottomed hole when viewed from a normal direction of the substrate.

LIQUID CRYSTAL DISPLAY DEVICE

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, MASK, AND DISPLAY APPARATUS

An array substrate includes a substrate and a via on a side of the substrate. The via includes a first structure and a second structure surrounding the first structure, and the first structure has a light transmittance different from the second structure. An orthographic projection of the first structure on the substrate has a substantially rectangular shape with a plurality of straight sides. An orthographic projection of the second structure on the substrate has a substantially octagonal shape, the second structure includes a plurality of first sub-structures and a plurality of second sub-structures, an orthographic projection of each first sub-structure on the substrate has a strip shape, the first sub-structures are parallel to the straight sides of the first structure in one-to-one correspondence, and an orthographic projection of each second sub-structure on the substrate has a tile shape. Each second sub-structure is between, and connects, two adjacent first sub-structures.

THIN FILM TRANSISTOR AND TRANSISTOR ARRAY SUBSTRATE
20240405025 · 2024-12-05 ·

There is provided a thin film transistor comprises a substrate; a semiconductor layer disposed on the substrate and including a channel area, a first conductive area connected to one side of the channel area, and a second conductive area connected to the other side of the channel area; a gate insulating layer covering areas other than the first conductive area and the second conductive area in the semiconductor layer; a gate electrode disposed on the gate insulating layer and overlapping the channel area in a plan view; and a first electrode disposed on the gate insulating layer on the one side of the channel area and in contact with a portion of the first conductive area. A first edge of the first electrode facing the gate electrode obliquely intersects a first edge of the gate insulating layer in a plan view.

Array substrate and manufacturing method therefor, and display panel

An array substrate and a manufacturing method therefor, and a display panel are provided. The manufacturing method includes: forming a scan line and a gate on a substrate; forming a first insulating layer covering the scan line and the gate on the substrate; forming a metal oxide semiconductor layer above the first insulating layer, the metal oxide semiconductor layer including a source, a drain and an active layer; coating an upper surface of the metal oxide semiconductor layer with a photosensitive material layer; photoetching the photosensitive material layer from the back side of the substrate by using a first metal layer as a mask to form a channel protection layer; performing conductorization treatment on the metal oxide semiconductor layer to enable the source and the drain to be conductive; forming a data line above the first insulating layer; and forming a pixel electrode above the first insulating layer.

METHOD OF FABRICATING METAL MASK
20250033102 · 2025-01-30 ·

A method of fabricating a metal mask includes receiving a metal planar substrate and patterning the metal planar substrate. The metal planar substrate includes a first surface and a second surface opposite to the first surface. The patterning the metal planar substrate includes forming strip-shaped structures, forming through holes, and forming a blind hole in a direction from the first surface to the second surface. The through holes extend to the first surface and the second surface. The through holes and the strip-shaped structures are alternately arranged. The blind hole extends across the through holes.

METHOD OF MANUFACTURING AN ELECTRONIC DEVICE
20250040246 · 2025-01-30 · ·

The present disclosure provides an electronic device comprising a substrate, and an electrode. The substrate comprises a base, a first metal layer disposed on the base, a second metal layer disposed on the first metal layer and electrically connected to the first metal layer, and an insulating layer disposed on second metal layer. The electrode is disposed on the insulating layer. The substrate comprises a high-level region and a low-level region. The insulating layer comprises an opening in the low-level region to expose a part of the second metal layer. A part of the electrode is disposed in the high-level region and another part of the electrode is disposed in the low-level region.

Manufacturing method of array substrate, array substrate and display device

The present invention provides an array substrate and a manufacturing method thereof and a display device. The manufacturing method comprises: forming a pattern including a pixel electrode and a source of a thin film transistor on a base substrate through a single patterning process, the pixel electrode is provided in a layer under a layer in which the source is located; forming a pattern including a drain, an active layer, a gate insulation layer and a gate of the thin film transistor through a single patterning process, the active layer covers the source and the drain, and is separated from the gate through the gate insulation layer; and forming a pattern including a passivation layer, a common electrode and a gate line through a single patterning process, the common electrode is a slit electrode and separated from the active layer and the pixel electrode through the passivation layer.

Manufacture method of TFT substrate structure and TFT substrate structure

The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.

Display panel and manufacturing method for the same

A display panel and manufacturing method. The method includes: forming a source electrode, a drain electrode and a channel on a substrate; depositing a first insulation layer; forming multiple color photoresists on the first insulation layer, and the source electrode, the drain electrode and the channel are located between two adjacent color photoresists; forming a gate electrode and a common electrode by a same process, and the gate electrode is located on the first insulation layer, and the common electrode is located on the photoresist; forming a second insulation layer having a through hole communicated with the source electrode on the gate electrode and the common electrode; forming a pixel electrode on the second insulation layer. The pixel electrode contacts with the source electrode through the through hole, and a storage capacitor is formed. The storage capacitor can be increased and the current leakage of the pixel electrode improved.