A display device includes a first electrode and a second electrode spaced apart from each other, each of the first electrode and the second electrode including an electrode base layer, a main electrode layer disposed on the electrode base layer, and an electrode upper layer disposed on a portion of the main electrode layer, a first insulating layer disposed on the first electrode and the second electrode, light-emitting elements disposed on the first electrode and the second electrode on the first insulating layer, a first connecting electrode electrically contacting the light-emitting elements, and a second connecting electrode electrically contacting the light-emitting elements. The first electrode includes a first part, the second electrode includes a second part, and the light-emitting elements are disposed on the first part and the second part.

An apparatus for manufacturing a display device includes a chamber, a heating member disposed inside the chamber to provide a thermal atmosphere inside the chamber, where the heating member includes a first heater and a second heater facing each other, a height adjustment member including an end disposed between the first heater and the second heater, and a driving unit which drives the end of the height adjustment member to move up or down such that the end of the height adjustment member is located at one of a first height and a second height which are different heights between the first heater and the second heater. Each of the first height and the second height is different from a height of a top surface of the first heater, and different from a height of a bottom surface of the second heater facing the top surface of the first heater.

Provided is an array substrate. The array substrate includes a base substrate, a gate line, a data line, a discharge line, a first pixel electrode, a first thin film transistor, a second thin film transistor and a first connection line. A control electrode of the first thin film transistor and a control electrode of the second thin film transistor are both connected to the gate line. The first electrode of the first thin film transistor is connected to the data line. Both the second electrode of the first thin film transistor and the first electrode of the second thin film transistor are connected to the first pixel electrode by the first connection line. The second electrode of the second thin film transistor is connected to the discharge line.

The present disclosure provides a display substrate, a method for manufacturing the display substrate and a display panel. The display substrate includes: a first semiconductor layer on a base substrate, where an active layer of the first thin film transistor is in the first semiconductor layer, and the active layer of the first thin film transistor at least comprises a channel region and a drain contact region; an interlayer insulation layer on a side of the first semiconductor layer away from the base substrate; and a first conductive layer on a side of the interlayer insulation layer away from the first semiconductor layer, wherein the pixel electrode is located in the first conductive layer, and the pixel electrode in the pixel unit is directly and electrically connected to the drain contact region of the active layer of the first thin film transistor through a through hole.

In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

A method for controlling a MIS structure design in a TFT and a system thereof are disclosed. The method comprises: obtaining dielectric constant of silicon nitride in the MIS structure as designed through calculation; and judging whether the dielectric constant of silicon nitride reaches a set value in a TFT manufacturing procedure, wherein if a negative judgment result is obtained, parameters of the MIS structure are adjusted, so as to enable dielectric constant of silicon nitride in the MIS structure after being adjusted to reach the set value in the TFT manufacturing procedure. A MIS structure design can be effectively controlled, thereby improving performance and stability of TFT-LCD products.

A display panel and manufacturing method. The method includes: forming a source electrode, a drain electrode and a channel on a substrate; depositing a first insulation layer; forming multiple color photoresists on the first insulation layer, and the source electrode, the drain electrode and the channel are located between two adjacent color photoresists; forming a gate electrode and a common electrode by a same process, and the gate electrode is located on the first insulation layer, and the common electrode is located on the photoresist; forming a second insulation layer having a through hole communicated with the source electrode on the gate electrode and the common electrode; forming a pixel electrode on the second insulation layer. The pixel electrode contacts with the source electrode through the through hole, and a storage capacitor is formed. The storage capacitor can be increased and the current leakage of the pixel electrode improved.

A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method can include: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, in which a metallic layer is disposed in the TFT region for electrical connection of the TFT; and a light absorbing layer configured to absorb at least part of light propagating toward the metallic layer is disposed on the metallic layer between the metallic layer and one of a gate insulating layer, an active layer, an interlayer dielectric layer and a substrate.

A method is provided for manufacturing a thin film transistor array substrate, which includes: a substrate on which a thin film transistor and a storage capacitor are formed on the substrate. The storage capacitor includes a first electrode plate formed on the substrate, a gate isolation layer or an etching stopper layer formed on the first electrode plate, and a second electrode plate formed on the gate isolation layer or the etching stopper layer. The etching stopper layer may be formed on the gate isolation layer, of which one is partially etched and removed such that there is only one of the gate isolation layer and the etching stopper layer existing between the two electrode plates of the storage capacitor so as to reduce the overall thickness of the isolation layer of the storage capacitor. Thus, the capacitor occupies a smaller area and a higher aperture ratio may be achieved.

A slim-bezel flexible display device and a manufacturing method thereof are disclosed. A through hole is formed in a first base plate of a lower substrate in an area adjacent to an edge thereof. A conductive connection body is mounted in the through hole. The conductive connection body is connected to a circuit layout layer and a flexible connection circuit that is connected to a drive circuit board so as to have the drive circuit board and the circuit layout layer connected. It is not necessary for the side of the lower substrate associated with the circuit layout layer to provide an additional connection zone for connection with the flexible connection circuit so that an effective display zone of a flexible display device can be enlarged and a bezel area can be reduced.