The present disclosure provides a semiconductor capacitor. The semiconductor capacitor includes a first conductive layer, a second conductive layer and a dielectric layer. The dielectric layer is located between the first conductive layer and the second conductive layer, and the first conductive layer and/or the second conductive layer are performed a plasma treatment to remove impurities therein and replace the impurities with nitrogen atoms. In addition, a method of forming a semiconductor capacitor is also disclosed.

A method of manufacturing a capacitor structure includes forming a dielectric film between lower and upper electrodes. The lower electrode includes a lower electrode film including a first metal element, a first doped oxide film including a second metal element selected from at least one of Group 5 to Group 11 and Group 15 metal elements and an oxide of the first metal element, and a first metal oxide film including an oxide of the first metal element. The upper electrode includes an upper electrode film including the first metal element, a second doped oxide film including the second metal element and an oxide of the first metal element, and a second metal oxide film including an oxide of the first metal element. The first and second metal oxide films are free of the second metal element.

A semiconductor device includes a first conductive material, a dielectric structure extending over a top surface of the first conductive material, the dielectric material having a first portion with a first thickness, and a second portion with a second thickness, and a third portion with a third thickness between the first thickness and the second thickness; and a second conductive material extending over the first portion of the dielectric structure. An oxygen-enriched portion of the second conductive material extends along a top surface and a sidewall of the second conductive material. A bottom surface and an interior portion of the second conductive material have an oxygen concentration which is larger than an oxygen concentration of a bottom surface and an interior portion of the second conductive material.

Provided is a semiconductor device. The semiconductor device includes a lower structure; a lower electrode on the lower structure; a dielectric layer on the lower electrode; and an upper electrode on the dielectric layer, wherein the lower electrode includes a bending reducing layer and a dielectric constant-increasing layer between the bending reducing layer and the dielectric layer, the dielectric constant-increasing layer is configured to increase a dielectric constant of the dielectric layer, and an elastic modulus of the bending reducing layer is greater than an elastic modulus of the dielectric constant-increasing layer.

Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.

A semiconductor device comprising a substrate, lower electrodes vertically extended on the substrate and horizontally spaced apart from each other, a conductive pattern provided on the substrate to conformally cover the lower electrodes, supporting patterns provided to penetrate the conductive pattern and connected to portions of side surfaces of the lower electrodes, and conductive islands disposed on surfaces of the supporting patterns. The conductive islands may be distributed on the surfaces of the supporting patterns to be spaced apart from each other, and the conductive pattern may be spaced apart from and electrically disconnected from the conductive islands.

A method of forming a semiconductor device includes the following step. A bottom electrode is formed over a substrate. A deposition process including one or more repetitions of a deposition cycle to is performed form a ferroelectric layer over the bottom electrode. The deposition process comprises performing a first deposition step including pulsing a first metal-containing precursor, pulsing a first oxidant reacting with the first metal-containing precursor to form a first monolayer, and performing a first plasma treatment to the first monolayer, and performing a second deposition step including pulsing a second metal-containing precursor, pulsing a second oxidant reacting with the second metal-containing precursor to form a second monolayer, and performing a second plasma treatment to the second monolayer. A top electrode is formed over the ferroelectric layer.

A nitride semiconductor device is a nitride semiconductor device including an active element and a passive element, and includes: a nitride semiconductor layer divided into an active region and an inactive region in a plan view; and a metal layer in contact with the nitride semiconductor layer in the inactive region. The active element is provided in the active region, and the passive element is provided in the inactive region. The metal layer includes a coherent state or a metamorphic state relative to the nitride semiconductor layer.

Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.