H10D8/01

SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A p-type semiconductor region formed in a front surface side of the semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donor in the FS region includes a first, second, third and fourth peaks in order from a front surface to the rear surface. A maximum point of peak concentration of the second peak is lower than a maximum point of peak concentration of the first peak.

Manufacturing method of a semiconductor device with efficient edge structure

A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

Monolithic growth of epitaxial silicon devices via co-doping

In one general embodiment, a structure includes a first diode, comprising: a first layer having a first type of dopant, and a second layer above the first layer, the second layer having a second type of dopant that is opposite to the first type of dopant. A second diode is formed directly on the first diode. The second diode comprises a first layer having a third type of dopant and a second layer above the first layer of the second diode, the second layer of the second diode having a fourth type of dopant that is opposite to the third type of dopant. In another general embodiment, a process includes a repeated sequence of growing a first layer having a first type of electrically active dopant and growing a second layer having a second type of electrically active dopant that is opposite to the first type of dopant.

Schottky diode and manufacturing method therefor
12310087 · 2025-05-20 · ·

Provided are a Schottky diode and a manufacturing method therefor. The Schottky diode includes a nitride channel layer; a nitride barrier layer formed on the nitride channel layer; a nitride cap layer formed on the nitride barrier layer, wherein the nitride cap layer includes an active region and an inactive region; a passivation layer formed on the nitride cap layer, where the passivation layer includes a first groove penetrating through the passivation layer to expose the nitride cap layer; a dielectric layer located on the passivation layer and an inner wall of the first groove, wherein the dielectric layer forms a second groove, and the dielectric layer includes a third groove penetrating through the dielectric layer to expose a part of the active region of the nitride cap layer; and an anode layer formed in the second groove and the third groove and in contact with the active region.

SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR ELEMENT
20250169086 · 2025-05-22 · ·

A semiconductor element includes a semiconductor layer having at least one MESA structure, a field plate disposed covering at least a part of the semiconductor layer, and an insulating film located between the semiconductor layer and the field plate. The semiconductor layer is an n-type gallium nitride layer, and a thickness of a bottom portion of the insulating film covering a bottom portion of a groove portion of the semiconductor layer is greater than a thickness of a side wall portion of the insulating film covering a side wall portion of the groove portion of the semiconductor layer.

Method for manufacturing semiconductor device, semiconductor device, semiconductor module, and power conversion device

Provided are a semiconductor device and a power converting device utilizing a field-stop layer in a vertical semiconductor device with improved manufacturability using large-diameter wafers. A semiconductor device manufacturing method according to the present invention is characterized by: a step for, after a pattern on a main surface side of a drift layer of a first conductivity type is formed, irradiating ions from a second main surface side to a predetermined depth; a step for, after the ion irradiation, converting the ions into donors by anneal processing of heating at 300-450 C. for 60 seconds or less, thereby forming a field-stop layer; and a step for reducing the thickness of a semiconductor substrate to a predetermined value from the second main surface side such that a crystal defect having occurred in the ion irradiating step is eliminated.

Method for manufacturing semiconductor device, semiconductor device, semiconductor module, and power conversion device

Provided are a semiconductor device and a power converting device utilizing a field-stop layer in a vertical semiconductor device with improved manufacturability using large-diameter wafers. A semiconductor device manufacturing method according to the present invention is characterized by: a step for, after a pattern on a main surface side of a drift layer of a first conductivity type is formed, irradiating ions from a second main surface side to a predetermined depth; a step for, after the ion irradiation, converting the ions into donors by anneal processing of heating at 300-450 C. for 60 seconds or less, thereby forming a field-stop layer; and a step for reducing the thickness of a semiconductor substrate to a predetermined value from the second main surface side such that a crystal defect having occurred in the ion irradiating step is eliminated.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

A semiconductor device includes a substrate that includes a first region and a second region that surrounds the first region, an epitaxial layer disposed in the first and second regions, where the epitaxial layer has a first conductivity type, a buried layer disposed below the epitaxial layer, where the buried layer has a second conductivity type that differs from the first conductivity type, a first high-concentration impurity region within the epitaxial layer in the first region, where the first high-concentration impurity region overlaps a top surface of the epitaxial layer and has the first conductivity type, a second high-concentration impurity region within the epitaxial layer in the first region, where the second high-concentration impurity region overlaps the top surface of the epitaxial layer and has the second conductivity type, and a device isolation film disposed on the epitaxial layer between the first and second high-concentration impurity regions.

Wide band gap semiconductor process, device, and method

A semiconductor substrate comprising a first epitaxial silicon carbide layer and a second silicon carbide epitaxial layer. At least one semiconductor device is formed in or on the second silicon carbide epitaxial layer. The semiconductor substrate is formed overlying a silicon carbide substrate having a surface comprising silicon carbide and carbon. An exfoliation process is used to remove the semiconductor substrate from the silicon carbide substrate. The carbon on the surface of the silicon carbide substrate supports separation. A portion of the silicon carbide substrate on the semiconductor substrate is removed after the exfoliation process. The surface of the silicon carbide substrate is prepared for reuse in subsequent formation of semiconductor substrates.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an IGBT arranged therein, and a withstand-voltage retention region surrounding the first region and the second regions in plan view are defined. The semiconductor substrate has a first main surface and a second main surface. The semiconductor substrate includes an anode layer having a first conductivity type, which is arranged in the first main surface of the first region, and a diffusion layer having the first conductivity type, which is arranged in the first main surface of the withstand-voltage retention region adjacently to the anode layer. A first trench is arranged in the first main surface on a side of the anode layer with respect to a boundary between the anode layer and the diffusion layer.