A transistor structure including a substrate, a gate structure, a first doped region, a second doped region, a drift region, a field plate, a charge storage layer, and a first dielectric layer is provided. The gate structure is located on the substrate. The first doped region and the second doped region are located in the substrate on two sides of the gate structure. The drift region is located in the substrate between the gate structure and the second doped region. The field plate is located on the substrate above the drift region. The charge storage layer is located between the field plate and the drift region. The first dielectric layer is located between the field plate and the charge storage layer.

A dielectric film, which contacts a field plate electrode, is formed between the field plate electrode and a gate electrode, and a recess is formed at an upper surface of the dielectric film and between a drain region and the gate electrode.

A semiconductor device for power amplification includes a substrate, a lower electrode, a semiconductor layer, a source electrode, a drain electrode, a gate electrode, and a field plate. The semiconductor layer is divided into an active region and an isolation region. In a plan view, a channel region includes unit channel regions that are separated by the isolation region and arranged in a Y-axis direction. The source electrode includes unit source electrodes each of which faces a corresponding one of the unit channel regions. The field plate includes unit plates each of which faces a corresponding one of the unit channel regions. At least one of plate drive lines is provided, for each of the unit plates, within the isolation region, the plate drive lines extending in an X-axis direction and electrically connecting the unit source electrodes and the unit plates.

A nitride semiconductor device includes: an electron transit layer; an electron supply layer that is formed on the electron transit layer and that has a band gap which is larger than that of the electron transit layer; a dielectric layer that is formed on the electron supply layer; and an electrode that has a contact part which is in electrical contact with the electron supply layer via at least an opening passing through the dielectric layer. The contact part has: an inclined surface that is inclined so as to decrease in width toward the electron transit layer; a tip surface that is in contact with the bottom face of the opening; and a curved surface that is provided between the tip surface and the inclined surface and that is curved so as to protrude toward the electron transit layer.

A nitride semiconductor device includes an electron transit layer, an electron supply layer disposed on the electron transit layer to generate two-dimensional electron gas in the electron transit layer, a gate layer containing acceptor impurities and disposed on the electron supply layer, a gate electrode contacting the gate layer, a source electrode, and a drain electrode. The gate layer includes a trench that is recessed from an upper surface of the gate layer in a region contacting the gate electrode. The trench includes a trench open end, a trench bottom surface, and a curved surface continuous with the trench bottom surface and curved from the trench bottom surface toward the trench open end.

A semiconductor device for power amplification includes a lower electrode, a semiconductor layer, a source electrode, a drain electrode, and a gate electrode. The semiconductor layer is divided into an active region and an isolation region. A channel region includes unit channel regions that are separated by the isolation region. The source electrode includes unit source electrodes each of which faces a corresponding one of the unit channel regions. Unit source regions each include at least one source via that contains a conductor in contact with the lower electrode, the unit source regions each including a corresponding one of the unit source electrodes. In a plan view, a length of a side of a minimum rectangular region in an X-axis direction is greater than a length of a side of the minimum rectangular region in the Y-axis direction, the minimum rectangular region surrounding the at least one source via.

A semiconductor device includes a semiconductor layer including a first surface and a second surface opposite to the first surface; a source trench formed in the semiconductor layer and including a side wall that is continuous with the second surface; an insulation layer formed on the second surface of the semiconductor layer; an embedded electrode arranged in the source trench and insulated from the side wall of the source trench by the insulation layer; a source interconnection formed on the insulation layer; and a source contact plug electrically connecting the source interconnection to the semiconductor layer. The source contact plug contacts the embedded electrode, and the source contact plug contacts the semiconductor layer via a part of the side wall of the source trench.

A power amplifier semiconductor device includes: a substrate; a semiconductor layer provided on the surface of the substrate and including a plurality of unit HEMTs; a connection layer provided on the semiconductor layer and including a source electrode, a drain electrode, and a gate electrode of each of the plurality of unit HEMTs; a terminal layer provided on the connection layer; a back electrode which is provided on the bottom surface of the substrate and whose potential is set to a source potential; and substrate vias that pass through the substrate and have a shield wiring layer on inner walls of the substrate vias. In plan view, either one of the drain aggregation portion or the gate aggregation portion is or both of the drain aggregation portion and the gate aggregation portion are each surrounded by the substrate vias.

Presented are structures and methods for forming such structures that allow for electrical or diffusion breaks between transistors of one level of a stacked transistor device, without necessarily requiring that a like electrical or diffusion break exists in another level of the stacked transistor device. Also presented, an electrical break between transistor devices may be formed by providing a channel of a first polarity with a false gate comprising a work-function metal of an opposite polarity.

An HEMT includes: a heterostructure; a dielectric layer on the heterostructure; a gate electrode, which extends throughout the thickness of the dielectric layer; a source electrode; and a drain electrode. The dielectric layer extends between the gate electrode and the drain electrode and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.