In embodiments, a semiconductor gas sensor includes a substrate having a cavity, a first insulation layer formed on the substrate, including an exposure hole formed at a position corresponding to the cavity and a peripheral portion of the cavity, a second insulation layer formed on the first insulation layer, covering the exposure hole, a heating electrode formed on the second insulation layer, being formed at a position corresponding to the cavity, a sensing electrode formed over the heating electrode, being electrically insulated from the heating electrode and a detection layer covering the sensing electrode, being capable of having a variable resistance when acting with a predetermined kind of gas.

After a trench is formed, a deposition film is formed on the front surface of a base material and an inner wall of the trench such that a thickness of a portion of the deposition film covering the front surface of the base material is greater than a thickness of a portion of the deposition film covering the inner wall of the trench. The total thickness of the deposition film is then reduced until the inner wall of the trench is exposed, leaving only the portion of the deposition film covering the front surface of the base material. By performing sacrificial oxidation in this state, the thermal oxide film caused by thermal oxidation barely grows at the interface of the front surface of the base material and the deposition film, and thus the thickness of an n+ source region is mostly maintained.

After a trench is formed, a deposition film is formed on the front surface of a base material and an inner wall of the trench such that a thickness of a portion of the deposition film covering the front surface of the base material is greater than a thickness of a portion of the deposition film covering the inner wall of the trench. The total thickness of the deposition film is then reduced until the inner wall of the trench is exposed, leaving only the portion of the deposition film covering the front surface of the base material. By performing sacrificial oxidation in this state, the thermal oxide film caused by thermal oxidation barely grows at the interface of the front surface of the base material and the deposition film, and thus the thickness of an n+ source region is mostly maintained.

The invention provides transient devices, including active and passive devices that electrically and/or physically transform upon application of at least one internal and/or external stimulus. Materials, modeling tools, manufacturing approaches, device designs and system level examples of transient electronics are provided.

A method of forming a graphite-based structure on a substrate comprises patterning the substrate thereby forming a plurality of elements on the substrate. Each respective element in the plurality of elements is separated from an adjacent element on the substrate by a corresponding trench in a plurality of trenches on the substrate and each respective element in the plurality of elements has a corresponding top surface. The method further comprises segmentedly depositing a graphene initiating layer onto the top surface of each respective element in the plurality of elements; and generating graphene using the graphene initiating layer thereby forming the graphite-based structure.

Example embodiments relate to an electronic device having a graphene-semiconductor multi-junction and a method of manufacturing the electronic device. The electronic device includes a graphene layer having at least one graphene protrusion and a semiconductor layer that covers the graphene layer. A side surface of each of the at least one graphene protrusion may be uneven, may have a multi-edge, and may be a stepped side surface. The graphene layer includes a plurality of nanocrystal graphenes. The graphene layer includes a lower graphene layer having a plurality of nanocrystal graphenes and the at least one graphene protrusion that is formed on the lower graphene layer. The semiconductor layer may include a transition metal dichalcogenide (TMDC) layer. Each of the at least one graphene protrusion may include a plurality of nanocrystal graphenes.

A method for forming a semiconductor device includes forming a III-V semiconductor substrate and forming a gate structure on the III-V semiconductor substrate. The method also includes forming a thin spacer surrounding the gate structure and forming a source/drain junction with a first doped III-V material at an upper surface of the III-V semiconductor substrate. The method also includes oxidizing a surface the source/drain forming an oxidation layer; removing natural oxides from the oxidation layer on a surface of the source/drain to expose ions of the first doped material at least at a surface of the source/drain. The method further includes applying a second doping to the source/drain to increase a doping concentration of the first doped III-V material, forming metal contacts at least at the second doped surface of the source/drain; and then annealing the contact.

According to one embodiment of the present invention, an electronic device includes: a carbon layer including graphene, a thin film layer formed on the carbon layer, a channel layer formed on the thin film layer, a current cutoff layer formed between the thin film layer and the channel layer so as to cut off the flow of current between the thin film layer and the channel layer, and a source electrode and a drain electrode formed on the channel layer.

A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, and a nonmagnetic bridge electrically connecting the free layer and the pinned layer. The shape and/or configuration of the nonmagnetic bridge directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer of the structure is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.

A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.