An apparatus wherein, in plane view, a first semiconductor region of a first conductivity type overlaps at least a portion of a third semiconductor region, a second semiconductor region overlaps at least a portion of a fourth semiconductor region of a second conductivity type, a height of a potential of the third semiconductor region with respect to an electric charge of the first conductivity type is lower than that of the fourth semiconductor region, and a difference between a height of a potential of the first semiconductor region and that of the third semiconductor region is larger than a difference between a height of a potential of the second semiconductor region and that of the fourth semiconductor region.

An integrated detection, flow cell and photonics (DFP) device is provided that comprises a substrate having an array of pixel elements that sense photons during active periods. The substrate and pixel elements form an IC photon detection layer. At least one wave guide is formed on the IC photo detection layer as a photonics layer. An optical isolation layer is formed over at least a portion of the wave guide. A collection of photo resist (PR) walls patterned to define at least one flow cell channel that is configured to direct fluid along a fluid flow path. The wave guides align to extend along the fluid flow path. The flow cell channel is configured to receive samples at sample sites that align with the array of pixel elements.

An optoelectronic device includes a first semiconductor die, having first and second surfaces and including a first array of transceiver elements. Each transceiver element includes an optical transducer, which directs outgoing coherent optical radiation through the first surface toward a target and to receive incoming optical radiation that has been reflected from the target. A single-photon optical detector outputs electrical pulses in response to photons of the incoming optical radiation. A waveguide conveys the incoming optical radiation from the optical transducer to the single-photon optical detector. A second semiconductor die is bonded to the second surface of the first semiconductor die and includes a second array of logic circuits, which are coupled to receive and process the electrical pulses output by the single-photon optical detectors in corresponding ones of the transceiver elements.

The disclosure provides a method and apparatus for extracting an avalanche signal. The method includes: obtaining an avalanche photodiode (APD) signal output by a single-photon detector, wherein the APD signal comprises an upper spike and a lower spike, the upper spike is generated along with a rising edge of a gating signal, and the lower spike is generated along with a falling edge of the gating signal; determining a delay position of the upper spike in the APD signal, so as to determine a delay position of the lower spike in the APD signal based on a pulse width of the gating signal; shifting a coincidence gate signal, so as to align a delay position of a falling edge of the coincidence gate signal with the delay position of the lower spike in the APD signal, wherein a pulse width of the coincidence gate signal is smaller than the pulse width of the gating signal; and extracting, as the avalanche signal, a second pulse that is generated through an AND operation on a first pulse that is generated by a partial signal, exceeding a discrimination threshold, in the APD signal and the coincidence gate signal.

The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to devices containing photodiodes such as avalanche photodiodes (APDs) and single photon avalanche diodes (SPADs). The present disclosure may provide a device including a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type in the substrate, and a buried layer of the second conductivity type in the substrate. The buried layer may be below the first well and the second well. The buried layer may have a first section and a second section, in which the first section has a larger thickness than the second section.

The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to devices containing photodiodes such as avalanche photodiodes (APDs) and single photon avalanche diodes (SPADs). The present disclosure may provide a device including a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type in the substrate, and a buried layer of the second conductivity type in the substrate. The buried layer may be below the first well and the second well. The buried layer may have a first section and a second section, in which the first section has a larger thickness than the second section.

An orientation-position determining device is provided which is used for a sensor installed in a vehicle. The orientation-position determining device includes an imaging unit and an orientation-position detector. The imaging unit works to obtain a ranging image and an ambient light image from the sensor. The ranging image represents a distance to a target lying in a light emission region to which light is emitted from the sensor. The ambient light image represents an intensity of ambient light and has a resolution higher than that of the ranging image. The orientation-position detector works to use the ranging image and the ambient light image to detect an orientation and/or a position of the sensor.

The present disclosure relates to a semiconductor photomultiplier comprising a substrate; an array of photosensitive cells formed on the substrate that are operably coupled between an anode and a cathode. A set of primary bus lines are provided each being associated with a corresponding set of photosensitive cells. A secondary bus line is coupled to the set of primary bus lines. An electrical conductor is provided having a plurality of connection sites coupled to respective connection locations on the secondary bus line for providing conduction paths which have lower impedance than the secondary bus line.

A photodetection circuit includes an avalanche photodiode and a mode switching circuit that may be configured to selectively switch an operating mode of the photodetection circuit between linear mode and Geiger mode. The photodetection circuit may further include a quenching circuit configured to quench and reset the avalanche photodiode in response to an avalanche event when the photodetection circuit is operated in Geiger mode. The photodetection circuit may additionally include an integration circuit configured to integrate photocurrent output by the photodiode and generate integrated charge units when the photodetection circuit is operated in linear mode. The photodetection circuit may also include a counter configured to count pulses output by the avalanche photodiode when the photodetection circuit is operated in Geiger mode and to count integrated charge units generated by the integration circuit when the photodetection circuit is operated in linear mode.

A photodetector including a photoelectric conversion structure made of a semiconductor material and, on a light-receiving surface of the conversion structure, a stack of first and second diffractive elements, the second element being above the first element, wherein: the first element includes at least one pad made of a material having an optical index n1, laterally surrounded with a region made of a material having an optical index n2 different from n1; the second element includes at least one pad made of a material having an optical index n3, laterally surrounded with a region made of a material having an optical index n4 different from n3; the pads of the first and second elements are substantially vertically aligned; and optical index differences n1n2 and n3n4 have opposite signs.