An integrated circuit layout is provided. The integrated circuit layout includes one or more first cell rows partially extending across a space arranged for an integrated circuit layout along a first direction. Each of the one or more first cell rows has a first height along a second direction perpendicular to the first direction. The integrated circuit layout includes one or more third cell rows partially extending across the space along the first direction. Each of the one or more third cell rows has a second height along the second direction, the second height different from the first height.

An information processing device includes; a memory; and a processor coupled to the memory and configured to: optimize performance of a mixture of a plurality of substances; in an energy function formula for weighting each of a plurality of physical properties in the mixture and performing a calculation to optimize the performance of the mixture, collectively incorporate a plurality of the physical properties that has a relationship correlated with one characteristic among the plurality of the physical properties into the energy function formula as the one characteristic; and simplify the energy function formula.

A computer-assisted method for determining a microfluidic circuit configured to reproduce a neuron circuit, and comprising including the following steps: —obtaining a description of the neuron circuit, the description of the neuron circuit comprising a plurality of neuron populations and at least one neuron connection; —determining at least one first parameter for each node of a plurality of nodes of the microfluidic circuit, each node being associated with and configured to receive one neuron population among the plurality of neuron populations of the neuron circuit; —determining at least one second parameter for at least one connection of the microfluidic circuit, each connection being associated with and configured to receive a neuron connection of the at least one neuron connection of the neuron circuit; —determining the positioning of each node of the plurality of nodes and of each connection of the at least one connection.

A hardware design for a component that evaluates a main algebraic expression comprising at least two variables is verified, the main algebraic expression being representable as a lossless combination of a plurality of sub-algebraic expressions, and one or more of the at least two variables can be constrained to cause an instantiation of the hardware design to evaluate each of the sub-algebraic expressions. An instantiation of the hardware design is verified as correctly evaluating each of the plurality of sub-algebraic expressions, and the instantiation of the hardware design is formally evaluated as correctly evaluating one or more combinations of sub-algebraic expressions, wherein the one or more combinations comprises a combination that is equivalent to the main algebraic expression.

Embodiments herein describe a techniques for identifying a first combinational cell 210 in a design for an integrated circuit, identifying a plurality of candidate combinational cells 205 to combine with the first combinational cell using a first criterion. The techniques also include combining the first combinational cell with at least one of the plurality of candidate combinational cells to form a multi-bit (MB) combinational cell 100. Upon determining the MB combinational cell satisfies a performance threshold, the first combinational cell and the at least one of the plurality of candidate combinational cells are replaced with the MB combinational cell in the design.

Various embodiments disclosed herein relate to a building automation controller and related method and storage medium including a processor configured, through at least execution of a distributed computer program, to: receive sensor data generated by a sensor, wherein the sensor data is indicative of a state of a defined space, identify an action to be performed by a device to affect the state in accordance with an operating characteristic for the defined space, determine that the device is attached to a second controller of a plurality of additional controllers, and transmit to the second controller, an indication that the action is to be performed by the device, wherein: the distributed computer program is configured to be distributed among the processor and the plurality of additional controllers and, the processor is further configured to apportion work to be performed by the computer program between at least the additional controllers.

A computer-readable storage medium that stores computer program code which, when executed by one or more processors, causes the one or more processors to execute tools for designing an integrated circuit (IC). The tools include a placing and routing tool that generates layout data and wire data corresponding to a net included in the IC by placing and routing standard cells defining the IC, the wire data including physical information of a wire implementing the net, and a timing analysis tool that calculates a wire delay with respect to the wire corresponding to the net, based on the physical information, updates the wire delay based on process variation of the wire, and calculates a timing slack by using the updated wire delay.

The techniques discussed herein generally relate to a method and system for qualitative modeling of and reasoning about the behavior of spatio-temporal physical systems. In some embodiments, qualitative representations based on Tonti diagrams are used to describe lumped or distributed parameter systems. Using a topological structure of the physical system, some embodiments generate qualitative governing equations as symbolic constraints on qualitative state variables. The qualitative constraints may be used to produce a qualitative simulation of the physical system. The qualitative simulation may be used to guide conceptual design iterations with given design criteria, or for instantiation of quantitative or hybrid (qualitative and quantitative) models and simulations.

A system and method for the automated design of accessible ramps is disclosed. A ramp data structure is provided having general shape information for a plurality of ramp types. A ramp environment data structure is also provided with 3D reference information for one or more ramp installation environments. After user selection of a ramp type and installation environment a 3D ramp design is automatically generated conforming to the selected ramp environment. Also, the ramp design may be automatically compared to a design standard to determine if the design is in compliance. Also, convenient editing may be employed while conforming to the ramp environment with real time updates to the 3D ramp design.

A method may include obtaining grid model data for a geological region of interest and well data for various wells in the geological region of interest. A well among the wells may correspond to a simulated well network in a reservoir simulation. The method may further include determining, based on the grid model data and the well data, a first simulation solution for a first constraint rate equation decoupled from the simulated well network and using a first search method. The method may further include determining, based on the grid model data, the well data, and the first simulation solution, a second simulation solution for a second constraint rate equation coupled to the simulated well network and using a second search method. The method may further include performing, based on the grid model data, and the second simulation solution, the reservoir simulation.