G06F111/04

MODULAR INTERCONNECT FOR AN INTEGRATED CIRCUIT DEVICE

An integrated circuit device includes a network-on-chip (NoC). Connections for the NoC are generated from a circuit design for the corresponding integrated circuit device. Connections within the NoC are generated by analyzing the circuit design to detect a first connection attribute. The first connection attribute defines a first NoC master unit (NMU) and a first NoC slave unit (NSU). Further, a first NoC configuration is generated. The first NoC configuration includes the connections determined based on the first NMU and the first NSU.

Methods and systems for modelling surface-based constraints in finite element analysis model
12314640 · 2025-05-27 · ·

A model representing a physical object is received. The model contains a pilot node, one or more surface nodes, and a constraint for coupling displacements/movements of the pilot node with the one or more surface nodes via a set of constraint equations. The pilot node is subject to a condition that restricts node swapping for resolving node dependency in elimination method. An internal node is created based on the pilot node. The internal node and the pilot node occupy a same location initially. The internal node and the one or more surface nodes are constrained via the set of constraint equations. The model is modified with the internal node and a numerical spring connecting the pilot node and the internal node. The numerical spring is configured for limiting relative movements between the pilot node and the internal node. Physical behaviors of the physical object are simulated using the modified model.

Control system having an adjacent electronic display for auto labeling and guided wiring

A controller is described with an adjacent electronic display which allows users to input building plans, and to design where devices (e.g., equipment and sensors) are to go. The controller has access to databases of the devices including wiring diagrams and protocols, such that the controller can automatically create a wiring diagram that can be used to wire the building and the controller. The adjacent display can be moved to show controller wiring, while the display shows a wiring diagram which describes a diagram of the controller wiring including devices that are connected, and wiring information about the devices.

Trial design platform

A method for determining trial designs is provided. The method includes obtaining simulation data for a set of trial designs. The simulation data includes performance parameters and performance parameter values associated with each design in the set of designs for a set of criteria; determining an optimality criteria for evaluating the trial designs; searching, within the set of trial designs, for globally optimum designs based on the optimality criteria; and recommending globally optimum designs.

Internal solver for articulations in simulation applications
12327071 · 2025-06-10 · ·

Simulation of complex agents, such as robots with many articulation links, can be performed utilizing a pre-computed a response matrix for each link. When an impulse is applied to a link for this agent, the response matrix for a root node can be used to determine an impact of that impulse on the root node, as well as changes in velocity for any direct child node. This process can be performed recursively for each link down to the leaf links of a hierarchical agent structure. These response matrices can be solved recursively from root to leaf while only visiting each hierarchical link once. Such an approach can be used to solve a full set of constraints acting on the agent in an amount of time per solver iteration that is on the order of the number of links, or O(N) time per solver iteration.

Multi-layer integrated circuit routing tool

A computer implemented method for a multi-layer integrated circuit routing tool connecting sources with nets to sinks in a hierarchical multi-layer integrated circuit design environment, the method including creating a cycle reach table containing a first set of information parameters for two dimensional nets per metal layer combination, creating a repeater reach table containing a second set of information parameters per constraint class, preparing a working list of nets, preparing a list of blocks larger than repeater reach dimensions, connecting a source pin to a sink pin on preassigned metal layers, by routing the net based on the given constraint class.

Modelling method and system

A method of modifying a CAD system model performed on a data processing system includes receiving a dataset of co-ordinates representing an article in 2d, or in 3d and receiving 2d or 3d constraints respectively, to be applied to any changes to the dataset of co-ordinates for the article. A modification to be applied to the dataset is received and combined with the relevant 2d and 3d constraints to produce a constrained modification for each of the article and associated article. The constrained modification is solved in 2d and in 3d to determine whether a solution exists in which all constraints are met. If the solve is successful, the constrained modification is applied to each dataset simultaneously and, updated datasets are stored. If the solve fails, the constraints may be reduced and the solve step repeated, or the process is terminated.

Constraint file-based novel framework for net-based checking technique

Net-based checking of a circuit design includes obtaining a circuit design comprising a plurality of polygons. Further, a shape of a first polygon of the plurality of polygons, and a shape of a second polygon of the plurality of polygons is determined. The shape of the first polygon differs from a shape of the second polygon. Violations within the circuit design are detected based on a comparison of the first polygon with the second polygon.

Interactive tool for design and analysis of experiments with different usage modes

A computing device receives user input for a design of an experiment. The user input indicates respective factor identities for factors in the design of the experiment, respective response identities for responses to options for the factors in the design, and a user-defined objective for the one or more responses. Additionally, based on the user input, the computing device displays a subset of a set of multiple model types and a user-definable amount of design runs for the design. Each design run presents settings according to the design for each of the factors. The computing device also receives settings indicating a user-selected model type from the subset and a user-defined amount of design runs, and based on the settings, selects one or more design construction criteria for generating the design. The computing device then generates the design according to the design construction criteria.

System and method for comparing circuit design constraint sets

Embodiments included herein are directed towards a method for comparing constraint sets. The embodiments may include determining, using at least one processor, at least one arrival propagation time corresponding to at least one endpoint, the at least one endpoint associated with a first constraint set and a second constraint set. The embodiments may further include creating, using the at least one processor, a first tag associated with the first constraint set and a second tag associated with the second constraint set. The embodiments may also include determining, using the at least one processor, at least one of: a non-equivalent path exception corresponding to the at least one endpoint and based at least in part on at least one of the arrival propagation time, the first tag, and the second tag; and an equivalent path exception corresponding to the at least one endpoint.