Semiconductor devices, integrated circuits containing such semiconductor devices, and related methods are described. For example, a semiconductor device includes a p-type field effect transistor comprising a gate, a source region connected to an upper supply terminal, and a drain region connected to an output terminal. The source region is a first p-type region formed in an n-type well region, the drain region is a second p-type region formed in the n-type well region, and the n-type well region is formed in a p-type epitaxial region over a p-type substrate. An n-type region formed in the n-type well region forms a first ring that laterally surrounds the first and second p-type regions and is connected to the upper supply terminal. A third p-type region formed in the p-type epitaxial region forms a second ring that laterally surrounds the n-type well region and is connected to the output terminal.

A semiconductor device including across-the-barrier (ATB) ESD protection circuitry configured to handle IEC currents. In one example, the semiconductor device comprises a circuit including a first port and a second port, a first clamp disposed between the first and second ports and configured to be coupled between two terminals of a coil of an isolation transformer, and a second clamp disposed between the first clamp and a reference node of the circuit.

Semiconductor devices are provided. The semiconductor device includes a substrate, a source region in the substrate, a drain region in the substrate and having a drain sidewall facing toward the source region, a gate structure on the substrate and between the drain region and the source region, and a first well in the substrate and underneath the drain region. The gate structure has a first gate sidewall facing toward the drain region. The first well has a well sidewall facing toward the source region. A first distance between the first gate sidewall and the drain sidewall is less than or equal to a second distance between the first gate sidewall and the well sidewall.