H10F30/223

LIGHT ABSORPTION APPARATUS
20170317135 · 2017-11-02 ·

A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.

ELECTROSTATIC DISCHARGE GUARD STRUCTURE

The present application provides an electrostatic discharge guard structure for photonic platform based photodiode systems. In particular this application provides a photodiode assembly comprising: a photodiode (such as a Si or SiGe photodiode); a waveguide (such as a silicon waveguide); and a guard structure, wherein the guard structure comprises a diode, extends about all or substantially all of the periphery of the Si or SiGe photodiode and allows propagation of light from the silicon waveguide into the Si or SiGe photodiode.

Photodetector using bandgap-engineered 2D materials and method of manufacturing the same

A photodetector includes an insulating layer on a substrate, a first graphene layer on the insulating layer, a 2-dimensional (2D) material layer on the first graphene layer, a second graphene layer on the 2D material layer, a first electrode on the first graphene layer, and a second electrode on the second graphene layer. The 2D material layer includes a barrier layer and a light absorption layer. The barrier layer has a larger bandgap than the light absorption layer.

MULTI-WAFER BASED LIGHT ABSORPTION APPARATUS AND APPLICATIONS THEREOF

Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.

Atomic layer junction oxide and preparing method thereof

Provided are an atomic layer junction oxide, a method of preparing the atomic layer junction oxide, and a photoelectric conversion device including the atomic layer junction oxide. The atomic layer junction oxide can include an n-type doped atomic layer oxide; an intrinsic atomic layer oxide; a p-type doped atomic layer oxide; and an intrinsic atomic layer oxide.

Optical sensor for range finding and wind sensing measurements
09778104 · 2017-10-03 · ·

Techniques are disclosed for providing an optical sensor that can be used for wind sensing and an optical scope. The optical sensor can include a photodiode, an electrical switch, a trans-impedance amplifier (TIA), and a capacitive trans-impedance amplifier (CTIA), enabling the optical sensor to perform both wind-sensing and range-finding functions. Some embodiments may include some or all of these components in an application-specific integrated circuit (ASIC), depending on desired functionality.

Compensated Photonic Device Structure And Fabrication Method Thereof

Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.

Semiconductor Device, Method for Driving Semiconductor Device, and Method for Driving Electronic Device
20170264848 · 2017-09-14 ·

To provide a solid-state imaging device with short image-capturing duration. A first photodiode in a pixel in an n-th row and an m-th column is connected to a second photodiode in a pixel in an (n+1)-th row and the m-th column through a transistor. The first photodiode and the second photodiode receive light concurrently, the potential in accordance with the amount of received light is held in a pixel in the n-th row and the m-th column, and the potential in accordance with the amount of received light is held in a pixel in the (n+1)-th row and the m-th column without performing a reset operation. Then, each potential is read out. Under a large amount of light, either the first photodiode or the second photodiode is used.

Electronic Devices Comprising N-Type and P-Type Superlattices
20170263809 · 2017-09-14 · ·

A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.

Optoelectronic Device with Modulation Doping

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.