An integrated circuit includes a first circuit cell having a first width and a second circuit cell having a second width. The second width is wider than the first width by at least one contacted poly pitch. An equivalent circuit of the first circuit cell is the same as an equivalent circuit of the second circuit cell. The integrated circuit includes a power grid conducting line extending between a first conducting line and a second conducting line. Each of the first conducting line and the second conducting line is connected to a connection pin in the second circuit cell.

A method of making a semiconductor device includes manufacturing active areas of a transistor over a substrate. The method further includes creating openings for source/drain regions (S/D regions) within the material of the active areas, wherein the openings expose the substrate. The method further includes manufacturing a bottom isolation structure within the openings for the S/D regions. The method further includes manufacturing the S/D regions over the bottom isolation structure within the openings. The method further includes manufacturing a contact opening extending into a trench isolation structure laterally spaced from the S/D regions. The method further includes depositing contact material within the contact opening. The method further includes exposing an end of the contact distal from the S/D regions.

An integrated circuit including a first cell and a second cell. The first cell includes a first plurality of active areas that extend in a first direction and a first plurality of gates that extend in a second direction that crosses the first direction, the first cell having first cell edges defined by breaks in the first plurality of gates. The second cell includes a second plurality of active areas that extend in the first direction and a second plurality of gates that extend in the second direction, the second cell having second cell edges defined by breaks in the second plurality of gates. Each of the second plurality of active areas is larger than each of the first plurality of active areas and the first cell is adjacent the second cell such that the first cell edges align with the second cell edges.

An integrated circuit including a first cell and a second cell. The first cell includes a first plurality of active areas that extend in a first direction and a first plurality of gates that extend in a second direction that crosses the first direction, the first cell having first cell edges defined by breaks in the first plurality of gates. The second cell includes a second plurality of active areas that extend in the first direction and a second plurality of gates that extend in the second direction, the second cell having second cell edges defined by breaks in the second plurality of gates. Each of the second plurality of active areas is larger than each of the first plurality of active areas and the first cell is adjacent the second cell such that the first cell edges align with the second cell edges.