A light emitting device may include a first semiconductor layer; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; an electrode layer disposed on the second semiconductor layer; a protective layer disposed on the electrode layer; and an insulating film enclosing outer circumferential surfaces of at least the first semiconductor layer, the active layer, the second semiconductor layer, and the electrode layer, and exposing a surface of the first semiconductor layer and a surface of the protective layer.

A light-emitting diode (LED) includes: an epitaxial structure having an upper and a lower surface, wherein the upper surface comprises a light-emitting surface; at least one insulating layer over the lower surface; and an electrode pad layer over the at least one insulating layer; wherein: the electrode pad layer comprises a P electrode region and an N electrode region; and the at least one insulating layer is configured to adjust a distribution of the P and N electrode regions over the electrode pad layer.

A method of producing an optoelectronic semiconductor chip includes providing a growth substrate and a semiconductor layer sequence grown on the growth substrate with a main extension plane including a p-conductive layer, an active zone and an n-conductive layer, removing the semiconductor layer sequence in regions to form at least one aperture extending through the p-conductive layer and the active zone into the n-conductive layer of the semiconductor layer sequence, depositing a protective layer on a side of the semiconductor layer sequence facing away from the growth substrate, depositing an aluminum layer containing aluminum across the entire surface on a side of the semiconductor layer sequence facing away from the growth substrate, removing the growth substrate, and forming a mesa by removing the semiconductor layer sequence at the regions of the protective layer, wherein the protective layer is subsequently freely externally accessible at least in places.

A method of manufacturing a semiconductor light emitting device, the method including arranging multiple particles M in a monolayer on a substrate S, dry etching the multiple particles M arranged to provide a void between the particles M in a condition by which the particles M are etched while the substrate S is not substantially etched; and dry etching the substrate S by using the multiple particles M.sub.1 after the particle etching as an etching mask, thereby forming an uneven structure on one surface X the substrate S.

A light emitting diode (LED) having distributed Bragg reflector (DBR) and a manufacturing method thereof are provided. The distributed Bragg reflector is used as a reflective element for reflecting the light generated by the light emitting layer to an ideal direction of light output. The distributed Bragg reflector has a plurality of through holes, such that the metal layer and the transparent conductive layer disposed on two sides of the distributed Bragg reflector may contact each other to conduct the current. Due to the distribution properties of the through holes, the current may be more uniformly diffused, and the light may be more uniformly emitted from the light emitting layer.

The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

A method for fabricating a light emitting device, comprising: forming a plurality of light emitting stacked layers above a substrate; forming and patterning a current blocking (CB) layer on the light emitting stacked layers; forming a transparent conductive layer covering the light emitting stacked layers and the current blocking layer; etching the transparent conductive layer and exposing a reserved region for a first pad electrode and a mesa structure, respectively; and etching an exposed portion of the light emitting stacked layers and a portion of the current blocking layer to form a remaining current blocking layer, the mesa structure and a first opening.

A method of preparing a quantum dot layer, including: placing an anodic aluminum oxide sheet with a plurality of through holes on a substrate; dispersing quantum dots into the plurality of through holes of the anodic aluminum oxide sheet; and removing the anodic aluminum oxide sheet to form a quantum dot layer.

A light emitting device package can include a base including a flat top surface; first and second electrical circuit layers on the flat top surface; a light emitting diode on a region of the flat top surface; an optical member to pass light; and a guiding member having a closed loop shape surrounding the region for guiding the optical member, in which the first and second electrical circuit layers respectively include first and second portions disposed between the flat top surface and a bottom surface of the guiding member, in which the first and second electrical circuit layers respectively include first and second extension portions that respectively extend from the first and second portions to locations outside of an outer edge of the guiding member in different directions.