Patent classifications
H10D12/038
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
A semiconductor device includes a trench-gate IGBT enabling the fine adjustment of a gate capacitance independent from cell performance. In a gate wiring lead-out region, a plurality of trenches is arranged spaced apart from each other in an X direction perpendicular to a Y direction. Each trench has a shape enclosed by a rectangular outer outline and a rectangular inner outline in plan view. A trench gate electrode is provided in each of the trenches so as to be electrically coupled to an extraction electrode. To obtain an adequate breakdown voltage between a collector and an emitter, the trenches are formed in a p-type floating region. An n.sup.-type drift region is formed in a region located inside an inner outline of the trench in plan view, whereby a capacitance formed between the trench gate electrode and the n.sup.-type drift region is used as the reverse transfer capacitance.
POWER DEVICE AND FABRICATING METHOD THEREOF
In one general aspect, a method of fabricating a power device can include preparing a semiconductor substrate of a first conductivity type, and forming a first Field Stop (FS) layer and a second FS layer.
Power Semiconductor Transistor Having Fully Depleted Channel Region
A power semiconductor transistor includes a semiconductor body coupled to a load terminal, a drift region, a first trench extending into the semiconductor body and including a control electrode electrically insulated from the semiconductor body by an insulator, a source region arranged laterally adjacent to a sidewall of the first trench and electrically connected to the load terminal, a channel region arranged laterally adjacent to the same trench sidewall as the source region, a second trench extending into the semiconductor body, and a guidance zone electrically connected to the load terminal and extending deeper into the semiconductor body than the first trench. The guidance zone is adjacent the opposite sidewall of the first trench as the source region and adjacent one sidewall of the second trench. In a section arranged deeper than the bottom of the first trench, the guidance zone extends laterally towards the channel region.
SEMICONDUCTOR DEVICE WITH DEEP DIFFUSION REGION
A method of processing a semiconductor device, comprising: providing a semiconductor body having dopants of a first conductivity type; forming at least one trench that extends into the semiconductor body along a vertical direction, the trench being laterally confined by two trench sidewalls and vertically confined by a trench bottom; applying a substance onto at least a section of a trench surface formed by one of the trench sidewalls and/or the trench bottom of the at least one trench, such that applying the substance includes preventing that the substance is applied to the other of the trench sidewalls; and diffusing of the applied substance from the section into the semiconductor body, thereby creating, in the semiconductor body, a semiconductor region having dopants of a second conductivity type and being arranged adjacent to the section.
Semiconductor device and method for manufacturing the same
In a semiconductor device, a first conductivity-type first semiconductor region that abuts on a side surface of a contact trench adjacent to an opening portion of the contact trench, and has a higher impurity concentration than that of a second semiconductor layer is formed. Also, a second conductivity-type second semiconductor region that abuts on a bottom surface of the contact trench and a side surface of the contact trench adjacent to the bottom surface of the contact trench, and has a higher impurity concentration than that of a first semiconductor layer is formed. A first electrode that is connected electrically with the first semiconductor region and the second semiconductor region is disposed in the contact trench. Even when the semiconductor device is miniaturized by reducing the width of the contact trench, a breakage of the semiconductor device when switched from an on-state to an off-state is reduced.
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device, in which, in a density distribution of first conductivity type impurities in the first conductivity type region measured along a thickness direction of the semiconductor substrate, a local maximum value N1, a local minimum value N2, a local maximum value N3, and a density N4 are formed in this order from front surface side, a relationship of N1>N3>N2>N4 is satisfied, a relationship of N3/10>N2 is satisfied, and a distance a from the surface to the depth having the local maximum value N1 is larger than twice a distance b from the depth having the local maximum value N1 to the depth having the local minimum N2.
Method of manufacturing semiconductor devices using light ion implantation and semiconductor device
A first doped region is formed in a single crystalline semiconductor substrate. Light ions are implanted through a process surface into the semiconductor substrate to generate crystal lattice vacancies between the first doped region and the process surface, wherein a main beam axis of an implant beam used for implanting the light ions deviates by at most 1.5 degree from a main crystal direction along which channeling of the light ions occurs. A second doped region with a conductivity type opposite to the first doped region is formed based on the crystal lattice vacancies and hydrogen atoms.
Insulated gate bipolar transistor (IGBT) and related methods
An insulated gate bipolar transistor (IGBT) includes a gate trench, an emitter trench, and an electrically insulative layer coupled to the emitter trench and the gate trench and electrically isolating the gate trench from an electrically conductive layer. A contact opening in the electrically insulative layer extends into the emitter trench and the electrically conductive layer electrically couples with the emitter trench therethrough. A P surface doped (PSD) region and an N surface doped (NSD) region are each located between the electrically conductive layer and a plurality of semiconductor layers of the IGBT and between the gate trench and the emitter trench. The electrically conductive layer electrically couples to the plurality of semiconductor layers through the PSD region and/or the NSD region.
Laser irradiation device
A semiconductor laser oscillator is formed by laser diodes arranged two-dimensionally in fast-axis and slow-axis directions. A laser beam emitted from the semiconductor laser oscillator is incident on a homogenizer. The homogenizer condenses the laser beam onto a long-length incident region at a surface to be irradiated. The homogenizer divides the laser beam into a plurality of beams with respect to a short-axis direction of the incident region, and superimposes the plurality of divided beams at the surface to be irradiated to cause the superimposed beams to be incident on the incident region. The slow-axis direction of the semiconductor laser oscillator is inclined with respect to a long-axis direction of the incident region.
TRENCH-TYPE INSULATED GATE SEMICONDUCTOR DEVICE INCLUDING AN EMITTER TRENCH AND AN OVERLAPPED FLOATING REGION
A semiconductor device of the present invention includes a semiconductor layer, a plurality of gate trenches formed in the semiconductor layer, a gate electrode filled via a gate insulating film in the plurality of gate trenches, an n.sup.+-type emitter region, a p-type base region, and an n.sup.-type drift region disposed, lateral to each gate trench, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer, a p.sup.+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n.sup.-type drift region, a plurality of emitter trenches formed between the plurality of gate trenches adjacent to each other, a buried electrode filled via an insulating film in the plurality of emitter trenches, and electrically connected with the n.sup.+-type emitter region, and a p-type floating region formed between the plurality of emitter trenches, and the p-type floating region is formed deeper than the p-type base region, and includes an overlap portion that goes around to a lower side of an emitter trench closest to the gate trench out of the plurality of emitter trenches and has an end portion positioned on a side closer to the gate trench with respect to a center in a width direction of the emitter trench.