Photoelectric conversion device incudes first region of first conductivity type arranged in semiconductor layer having first second surfaces, second region of second conductivity type arranged between the second surface and the first region and forming avalanche photodiode, separation region of the second conductivity type arranged between the first and second surfaces to surround the second region, contact region of the second conductivity type contacted to the separation region, first contact plug connected to the first region, and second contact plug connected to the contact region. The second region has shape of rectangle, and the second contact plug is arranged in diagonal direction of the rectangle. Distance between center of the first contact plug and center of the second contact plug is larger than distance between center of the second region and the center of the second contact plug.

A photodetector includes a metal layer that shields incident light and generates surface plasmon polaritons (SPPs), a light absorbing layer that absorbs the generated SPPs and allows charges excited by the absorbed SPPs and a localized electric field effect to tunnel, a dielectric formed at nanoholes in which at least a part of the metal layer is opened, and a semiconductor layer that induces the photocurrent based on an electric field effect of tunneled electrons. The SPPs form localized surface plasmons (LSPs) at an interface where the metal layer meets the dielectric.

An apparatus wherein, in plane view, a first semiconductor region of a first conductivity type overlaps at least a portion of a third semiconductor region, a second semiconductor region overlaps at least a portion of a fourth semiconductor region of a second conductivity type, a height of a potential of the third semiconductor region with respect to an electric charge of the first conductivity type is lower than that of the fourth semiconductor region, and a difference between a height of a potential of the first semiconductor region and that of the third semiconductor region is larger than a difference between a height of a potential of the second semiconductor region and that of the fourth semiconductor region.

The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to devices containing photodiodes such as avalanche photodiodes (APDs) and single photon avalanche diodes (SPADs). The present disclosure may provide a device including a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type in the substrate, and a buried layer of the second conductivity type in the substrate. The buried layer may be below the first well and the second well. The buried layer may have a first section and a second section, in which the first section has a larger thickness than the second section.

The present disclosure generally relates to semiconductor devices for use in optoelectronic/photonic applications and integrated circuit (IC) chips. More particularly, the present disclosure relates to devices containing photodiodes such as avalanche photodiodes (APDs) and single photon avalanche diodes (SPADs). The present disclosure may provide a device including a substrate, a first well of a first conductivity type in the substrate, a second well of a second conductivity type in the substrate, and a buried layer of the second conductivity type in the substrate. The buried layer may be below the first well and the second well. The buried layer may have a first section and a second section, in which the first section has a larger thickness than the second section.

A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.

Disclosed are functionalized Group IVA particles, methods of preparing the Group IVA particles, and methods of using the Group IVA particles. The Group IVA particles may be passivated with at least one layer of material covering at least a portion of the particle. The layer of material may be a covalently bonded non-dielectric layer of material. The Group IVA particles may be used in various technologies, including lithium ion batteries and photovoltaic cells.

Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

A photovoltaic device and method include depositing a metal film on a substrate layer. The metal film is annealed to form islands of the metal film on the substrate layer. The substrate layer is etched using the islands as an etch mask to form pillars in the substrate layer.

A manufacturing method of a sensing integrated circuit including the following acts. A plurality of transistors are formed. At least one dielectric layer is formed on or above the transistors. A plurality of connecting structures are formed in the dielectric layer. The connecting structures are respectively and electrically connected to the transistors. A plurality of separated conductive wells are respectively formed in electrical contact with the connecting structures.