A process for etching a substrate comprising polycrystalline silicon to form silicon nanostructures includes depositing metal on top of the substrate and contacting the metallized substrate with an etchant aqueous solution comprising about 2 to about 49 weight percent HF and an oxidizing agent.

A method of making a CIGS/inorganic thin film tandem semiconductor device including the steps of depositing a textured buffer layer on an inexpensive substrate, depositing a metal-inorganic film from a eutectic alloy on the buffer layer, the metal being selected from a group of CIGS elements, and adding the remaining CIGS elements to the metal, thereby growing a CIGS film on the inorganic film for the tandem semiconductor device.

The invention relates in particular to a method for producing subsequent patterns in an underlying layer (120), the method comprising at least one step of producing prior patterns in a carbon imprintable layer (110) on top of the underlying layer (120), the production of the prior patterns involving nanoimprinting of the imprintable layer (110) and leave in place a continuous layer formed by the imprintable layer (110) and covering the underlying layer (120), characterized in that it comprises the following step: at least one step of modifying the underlying layer (120) via ion implantation (421) in the underlying layer (120), the implantation (421) being carried out through the imprintable layer (110) comprising the subsequent patterns, the parameters of the implantation (421) being chosen in such a way as to form, in the underlying layer (120), implanted zones (122) and non-implanted zones, the non-Implanted zones defining the subsequent patterns and having a geometry that is dependent on the prior patterns.

High speed optoelectronic devices and associated methods are provided. In one aspect, for example, a high speed optoelectronic device can include a silicon material having an incident light surface, a first doped region and a second doped region forming a semiconductive junction in the silicon material, and a textured region coupled to the silicon material and positioned to interact with electromagnetic radiation. The optoelectronic device has a response time of from about 1 picosecond to about 5 nanoseconds and a responsivity of greater than or equal to about 0.4 A/W for electromagnetic radiation having at least one wavelength from about 800 nm to about 1200 nm.

An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a first semiconductor layer sequence having a plurality of microdiodes, and a second semiconductor layer sequence having an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as holes, effectively increase the absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more. Their thickness dimensions allow them to be conveniently integrated on the same Si chip with CMOS, BiCMOS, and other electronics, with resulting packaging benefits and reduced capacitance and thus higher speeds.

A photovoltaic cell is provided, including a substrate; a marked region on a surface of the substrate, configured to mark product information of the photovoltaic cell; a first texture structure in the marked region on the surface of the substrate, including at least one first protrusion structure and at least one second protrusion structure, a respective first protrusion structure of the at least one first protrusion structure has a recessed top surface recessing toward a bottom surface of the respective first protrusion structure, and a respective second protrusion structure of the at least one second protrusion structure includes a pyramid structure; and a second texture structure disposed on a part of the surface of the substrate outside the marked region, where the second texture structure includes at least one third protrusion structure, and a respective third protrusion structure of the at least one third protrusion structure includes a pyramid structure.

An InGaN/GaN multiple quantum well blue light detector- includes: a Si substrate, an AlN/AlGaN/GaN buffer layer, a u-GaN/AlN/u-GaN/SiN.sub.x/u-GaN buffer layer, an n-GaN buffer layer, an InGaN/GaN superlattice layer and an InGaN/GaN multiple quantum well layer in sequence from bottom to top. The multiple quantum well layer has a groove and a mesa, the mesa and the groove of the multiple quantum well layer are provided with a Si.sub.3N.sub.4 passivation layer. The passivation layer in the groove is provided with a first metal layer electrode with a semicircular cross section, and the passivation layer on the mesa is provided with second metal layer electrode.

The disclosure relates to the technical field of solar cells, and provides a solar cell and a doped region structure thereof, a cell assembly, and a photovoltaic system. The doped region structure includes a first doped layer, a passivation layer, and a second doped layer that are disposed on a silicon substrate in sequence. The passivation layer is a porous structure having the first doped layer and/or the second doped layer inlaid in a hole region. The first doped layer and the second doped layer have a same doping polarity. By means of the doped region structure of the solar cell provided in the disclosure, the difficulty in production and the limitation on conversion efficiency as a result of precise requirements for the accuracy of a thickness of a conventional tunneling layer are resolved.