Patent classifications
H10F77/703
OPTOELECTRONIC DEVICE AND METHOD OF PRODUCING THE SAME
An optoelectronic device and method of producing the same. The optoelectronic device comprising a substrate having a first and a second substantially planar face and an aperture therein, the aperture passing through and penetrating the first and second substantially planar faces of the substrate. The aperture has a first and a second face defining a space therebetween. The space is at least partially filled with a first semiconductor material, the first face is coated with a conductor material and the second face is coated with a second semiconductor material.
PHOTOELECTRIC CONVERSION ELEMENT AND SOLAR CELL MODULE PROVIDED WITH SAME
There is provided a photoelectric conversion element which includes an n-type single crystal silicon substrate (1). The n-type single crystal silicon substrate (1) includes a central region (11) and an end-portion region (12). The central region (11) is a region which has the same central point as the central point of the n-type single crystal silicon substrate (1) and is surrounded by a circle. The diameter of the circle is set to be a length which is 40% of a length of the shortest side among four sides of the n-type single crystal silicon substrate (1). The central region (11) has a thickness t1. The end-portion region (12) is a region of being within 5 mm from an edge of the n-type single crystal silicon substrate (1). The end-portion region (12) is disposed on an outside of the central region (11) in an in-plane direction of the n-type single crystal silicon substrate (1), and has a thickness t2 which is thinner than the thickness t1. The end-portion region (12) has average surface roughness which is smaller than average surface roughness of the central region (11).
PHOTODIODE AND PHOTODIODE ARRAY
A p.sup. type semiconductor substrate 20 has a first principal surface 20a and a second principal surface 20b opposed to each other and includes a photosensitive region 21. The photosensitive region 21 is composed of an n.sup.+ type impurity region 23, a p.sup.+ type impurity region 25, and a region to be depleted with application of a bias voltage in the p.sup. type semiconductor substrate 20. An irregular asperity 10 is formed in the second principal surface 20b of the p.sup. type semiconductor substrate 20. An accumulation layer 37 is formed on the second principal surface 20b side of the p.sup. type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.
Textured silicon substrate and method
A method of texturizing a silicon substrate comprising a) contacting the substrate with an etching solution comprising glycolic acid, b) etching a surface of the substrate thereby forming disruptions in said surface of the substrate, and c) removing the etching solution to yield a texturized substrate, said texturized substrate having a plurality of disruptions in at least one surface with a surface density of disruptions of a minimum of 60 disruptions in a 400 micron square area.
Photovoltaic devices with fine-line metallization and methods for manufacture
A method for use in forming a photovoltaic device includes forming a doped semiconductor layer on a surface of a semiconductor substrate and forming a metal film on the doped semiconductor layer. A patterned etched resist is formed on the metal film and a dielectric layer is formed on the doped semiconductor layer and the etched resist. A laser having a wavelength absorbable by the patterned etch resist is applied through the dielectric layer to the patterned etch resist to remove the patterned etch resist.
HETEROJUNCTION BATTERY AND PREPARATION METHOD THEREFOR
A heterojunction battery and a preparation method therefor are provided. The heterojunction battery includes a crystalline silicon layer, a first intrinsic amorphous silicon layer, an N-type doped microcrystalline silicon layer, a first transparent conductive layer, and a first metal electrode are sequentially arranged on a front surface of the crystalline silicon layer from inside to outside, and a second intrinsic amorphous silicon layer, a P-type doped microcrystalline silicon layer, a second transparent conductive layer, and a second metal electrode are sequentially arranged on a back surface of the crystalline silicon layer from inside to outside. A local reduction layer is formed on a surface of the first transparent conductive layer that is under the first metal electrode and/or on a surface of the second transparent conductive layer that is under the second metal electrode.
Solar cell and production method thereof, photovoltaic module
Embodiments of the present disclosure relates to the field of solar cells, and in particular to a solar cell and a production method thereof, and a photovoltaic module. The solar cell includes: a P-type emitter formed on a first surface of an N-type substrate and including a first portion and a second portion, a top surface of the first portion includes first pyramid structures, and a top surface of the second portion includes second pyramid structures whose edges are straight. A transition surface is respectively formed on at least one edge of each first pyramid structure, and each of top surfaces of at least a part of the first pyramid structures includes a spherical or spherical-like substructure. A tunnel layer and a doped conductive layer sequentially formed over a second surface of the N-type substrate. The present disclosure can improve the photoelectric conversion performance of solar cells.
Method of depositing a perovskite material
There is provided a method of producing a photovoltaic device comprising a photoactive region comprising a layer of perovskite material, wherein the layer of perovskite material is disposed on a surface that has a roughness average (R.sub.a) or root mean square roughness (R.sub.rms) of greater than or equal to 50 nm. The method comprises using vapour deposition to deposit a substantially continuous and conformal solid layer comprising one or more initial precursor compounds of the perovskite material, and subsequently treating the solid layer with one or more further precursor compounds to form a substantially continuous and conformal solid layer of the perovskite material on the rough surface. There is also provided a photovoltaic device comprising a photoactive region comprising a layer of perovskite material disposed using the method.
Back-side metal electrode of N-type TOPCon solar cell, and method for preparing back-side metal electrode of N-type TOPCon solar cell, and N-type TOPCon solar cell
Some embodiments of the present invention relate to a technical field of N-type TOPCon solar cells, and disclose a back-side metal electrode of an N-type TOPCon solar cell. The back-side metal electrode includes a substrate, a plurality of first silver fine grids disposed on a passivation film which is on a back side of the substrate, a plurality of second aluminum fine grids overlaid on the plurality of first silver fine grids, and a plurality of first silver main grids disposed perpendicular to the plurality of first silver fine grids. Each of the plurality of first silver main grids is a segmented structure. The back-side metal electrode further includes a plurality of second aluminum main grids, which are formed, in a printing manner, between any two adjacent grid segments of a plurality of grid segments and around each of the plurality of grid segments.
Solar cell and photovoltaic module
Provided is a solar cell and a photovoltaic module. The solar cell includes a silicon substrate, and the silicon substrate includes a front surface and a back surface arranged opposite to each other. P-type conductive regions and N-type conductive regions are alternately arranged on the back surface of the silicon substrate. Front surface field regions are located on the front surface of the silicon substrate and spaced from each other. The front surface field regions each corresponds to one of the P-type conductive regions or one of the N-type conductive regions. At least one front passivation layer is located on the front surface of the silicon substrate. At least one back passivation layer is located on surfaces of the P-type conductive regions and N-type conductive regions.