In one aspect, a preparation method for a solar cell includes the following steps: sequentially forming a first silicon oxide layer, an intrinsic amorphous silicon layer, a phosphorosilicate glass layer and a second silicon oxide layer on the back surface of an n-type silicon substrate; removing the phosphorosilicate glass layer and the second silicon oxide layer in a partial region of the back surface of the n-type silicon substrate; subjecting the back surface of the n-type silicon substrate to boron diffusion; forming an isolation groove at the boundary between the boron-doped polycrystalline silicon layer and the phosphorus-doped polycrystalline silicon layer; and preparing a first electrode connected to the boron-doped polycrystalline silicon layer and a second electrode connected to the phosphorus-doped polycrystalline silicon layer.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Disclosed is a method for producing a photovoltaic cell. The method includes providing a silicon wafer, forming a tunneling oxide layer on a first side of the silicon wafer, forming an amorphous silicon layer having alternatingly arranged P-type amorphous silicon and N-type amorphous silicon on a side of the tunneling oxide layer away from the silicon wafer, forming a protective layer on a side of the amorphous silicon layer away from the silicon wafer, performing laser processing on the protective layer and the amorphous silicon layer to form grooves, subjecting the silicon wafer to further processing to increase depths of the grooves, removing the protective layer, and subjecting the silicon wafer to high temperature processing to convert the amorphous silicon layer into a polycrystalline silicon layer.