A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.

An optoelectronic device as well as its methods of use and manufacture are disclosed. In one embodiment, an optoelectronic device includes first and second semiconducting atomically thin layers with corresponding first and second lattice directions. The first and second semiconducting atomically thin layers are located proximate to each other, and an angular difference between the first lattice direction and the second lattice direction is between about 0.000001 and 0.5, or about 0.000001 and 0.5 deviant from of a Vicnal angle of the first and second semiconducting atomically thin layers. Alternatively, or in addition to the above, the first and second semiconducting atomically thin layers may form a Moir superlattice of exciton funnels with a period between about 50 nm to 3 cm. The optoelectronic device may also include charge carrier conductors in electrical communication with the semiconducting atomically thin layers to either inject or extract charge carriers.

A light detection device includes a substrate, a buffer layer disposed on the substrate, a first band gap change layer disposed on a portion of the buffer layer, a light absorption layer disposed on the first band gap change layer, a Schottky layer disposed on a portion of the light absorption layer, and a first electrode layer disposed on a portion of the Schottky layer.

A method for fabricating an optically transparent conductor including depositing a plurality of metal nanowires on a substrate, annealing or illuminating the plurality of metal nanowires to thermally or optically fuse nanowire junctions between metal nanowires to form a metal nanowire network, disposing a graphene layer over the metal nanowire network to form a nanohybrid layer comprising the graphene layer and the metal nanowire network, depositing a dielectric passivation layer over the nanohybrid layer, patterning the dielectric passivation layer using lithography, printing, or any other method of patterning to define an area for the optically transparent conductor, and etching the patterned dielectric passivation layer to define the optically transparent conductor.

Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

A photodetector includes an insulating layer on a substrate, a first graphene layer on the insulating layer, a 2-dimensional (2D) material layer on the first graphene layer, a second graphene layer on the 2D material layer, a first electrode on the first graphene layer, and a second electrode on the second graphene layer. The 2D material layer includes a barrier layer and a light absorption layer. The barrier layer has a larger bandgap than the light absorption layer.

A method of forming a wavelength detector that includes forming a first transparent material layer having a uniform thickness on a first mirror structure, and forming an active element layer including a plurality of nanomaterial sections and electrodes in an alternating sequence atop the first transparent material layer. A second transparent material layer is formed having a plurality of different thickness portions atop the active element layer, wherein each thickness portion correlates to at least one of the plurality of nanomaterials. A second mirror structure is formed on the second transparent material layer.

Optically sensitive devices include a device comprising a first contact and a second contact, each having a work function, and an optically sensitive material between the first contact and the second contact. The optically sensitive material comprises a p-type semiconductor, and the optically sensitive material has a work function. Circuitry applies a bias voltage between the first contact and the second contact. The optically sensitive material has an electron lifetime that is greater than the electron transit time from the first contact to the second contact when the bias is applied between the first contact and the second contact. The first contact provides injection of electrons and blocking the extraction of holes. The interface between the first contact and the optically sensitive material provides a surface recombination velocity less than 1 cm/s.

A method of forming a layered OP material is provided, where the layered OP material comprises an OPGaAs template, and a layer of GaP on the OPGaAs template. The OPGaAs template comprises a patterned layer of GaAs having alternating features of inverted crystallographic polarity of GaAs. The patterned layer of GaAs comprises a first feature comprising a first crystallographic polarity form of GaAs having a first dimension, and a second feature comprising a second crystallographic polarity form of GaAs having a second dimension. The layer of GaP on the patterned layer of GaAs comprises alternating regions of inverted crystallographic polarity that generally correspond to their underlying first and second features of the patterned layer of GaAs. Additionally, each of the alternating regions of inverted crystallographic polarity of GaP are present at about 100 micron thickness or more.

There are disclosed herein various implementations of a semiconductor component including one or more aluminum silicon nitride layers. The semiconductor component includes a substrate, a group III-V intermediate body situated over the substrate, a group III-V buffer layer situated over the group III-V intermediate body, and a group III-V device fabricated over the group III-V buffer layer. The group III-V intermediate body includes the one or more aluminum silicon nitride layers.